initial commit

27 files changed, 906 insertions, 0 deletions

diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..1ef06c5
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,5 @@
+copyright/
+**/*.cache
+**/compile_commands.json
+**/.DS_Store
+**/.$*
diff --git a/.gitmodules b/.gitmodules
new file mode 100644
index 0000000..eb84b02
--- /dev/null
+++ b/.gitmodules
@@ -0,0 +1,13 @@
+[submodule "stm32/lib/STM32-base"]
+	path = stm32/lib/STM32-base
+	url = https://github.com/STM32-base/STM32-base
+	ignore = all
+[submodule "stm32/lib/STM32-base-STM32Cube"]
+	path = stm32/lib/STM32-base-STM32Cube
+	url = https://github.com/STM32-base/STM32-base-STM32Cube
+	ignore = all
+[submodule "stm32/lib/FreeRTOS-Kernel"]
+	path = stm32/lib/FreeRTOS-Kernel
+	url = https://github.com/FreeRTOS/FreeRTOS-Kernel
+	ignore = all
+	branch = V10.4.6
diff --git a/assets/.gitignore b/assets/.gitignore
new file mode 100644
index 0000000..e69de29
--- /dev/null
+++ b/assets/.gitignore
diff --git a/basys3/.gitignore b/basys3/.gitignore
new file mode 100644
index 0000000..262a2cc
--- /dev/null
+++ b/basys3/.gitignore
@@ -0,0 +1,8 @@
+*.cache
+*.hw
+*.ioplanning
+*.ip_user_files
+*.runs
+*.sim
+*.gen
+*.dcp
diff --git a/basys3/basys3.xpr b/basys3/basys3.xpr
new file mode 100644
index 0000000..2f0da88
--- /dev/null
+++ b/basys3/basys3.xpr
@@ -0,0 +1,210 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<!-- Product Version: Vivado v2022.2 (64-bit)              -->
+<!--                                                         -->
+<!-- Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.   -->
+
+<Project Version="7" Minor="61" Path="/home/loek/docs/repos/avans-arcade/basys3/basys3.xpr">
+  <DefaultLaunch Dir="$PRUNDIR"/>
+  <Configuration>
+    <Option Name="Id" Val="c71bd79008bf4728a2417b154418cb5f"/>
+    <Option Name="Part" Val="xc7a35tcpg236-1"/>
+    <Option Name="CompiledLibDir" Val="$PCACHEDIR/compile_simlib"/>
+    <Option Name="CompiledLibDirXSim" Val=""/>
+    <Option Name="CompiledLibDirModelSim" Val="$PCACHEDIR/compile_simlib/modelsim"/>
+    <Option Name="CompiledLibDirQuesta" Val="$PCACHEDIR/compile_simlib/questa"/>
+    <Option Name="CompiledLibDirXcelium" Val="$PCACHEDIR/compile_simlib/xcelium"/>
+    <Option Name="CompiledLibDirVCS" Val="$PCACHEDIR/compile_simlib/vcs"/>
+    <Option Name="CompiledLibDirRiviera" Val="$PCACHEDIR/compile_simlib/riviera"/>
+    <Option Name="CompiledLibDirActivehdl" Val="$PCACHEDIR/compile_simlib/activehdl"/>
+    <Option Name="SimulatorInstallDirModelSim" Val=""/>
+    <Option Name="SimulatorInstallDirQuesta" Val=""/>
+    <Option Name="SimulatorInstallDirXcelium" Val=""/>
+    <Option Name="SimulatorInstallDirVCS" Val=""/>
+    <Option Name="SimulatorInstallDirRiviera" Val=""/>
+    <Option Name="SimulatorInstallDirActiveHdl" Val=""/>
+    <Option Name="SimulatorGccInstallDirModelSim" Val=""/>
+    <Option Name="SimulatorGccInstallDirQuesta" Val=""/>
+    <Option Name="SimulatorGccInstallDirXcelium" Val=""/>
+    <Option Name="SimulatorGccInstallDirVCS" Val=""/>
+    <Option Name="SimulatorGccInstallDirRiviera" Val=""/>
+    <Option Name="SimulatorGccInstallDirActiveHdl" Val=""/>
+    <Option Name="SimulatorVersionXsim" Val="2022.2"/>
+    <Option Name="SimulatorVersionModelSim" Val="2022.2"/>
+    <Option Name="SimulatorVersionQuesta" Val="2022.2"/>
+    <Option Name="SimulatorVersionXcelium" Val="21.09.009"/>
+    <Option Name="SimulatorVersionVCS" Val="S-2021.09"/>
+    <Option Name="SimulatorVersionRiviera" Val="2022.04"/>
+    <Option Name="SimulatorVersionActiveHdl" Val="13.0"/>
+    <Option Name="SimulatorGccVersionXsim" Val="6.2.0"/>
+    <Option Name="SimulatorGccVersionModelSim" Val="7.4.0"/>
+    <Option Name="SimulatorGccVersionQuesta" Val="7.4.0"/>
+    <Option Name="SimulatorGccVersionXcelium" Val="9.3.0"/>
+    <Option Name="SimulatorGccVersionVCS" Val="9.2.0"/>
+    <Option Name="SimulatorGccVersionRiviera" Val="9.3.0"/>
+    <Option Name="SimulatorGccVersionActiveHdl" Val="9.3.0"/>
+    <Option Name="BoardPart" Val="digilentinc.com:basys3:part0:1.2"/>
+    <Option Name="BoardPartRepoPaths" Val="$PPRDIR/../../../../.Xilinx/Vivado/2022.2/xhub/board_store/xilinx_board_store"/>
+    <Option Name="ActiveSimSet" Val="sim_1"/>
+    <Option Name="DefaultLib" Val="xil_defaultlib"/>
+    <Option Name="ProjectType" Val="Default"/>
+    <Option Name="IPOutputRepo" Val="$PCACHEDIR/ip"/>
+    <Option Name="IPDefaultOutputPath" Val="$PGENDIR/sources_1"/>
+    <Option Name="IPCachePermission" Val="read"/>
+    <Option Name="IPCachePermission" Val="write"/>
+    <Option Name="EnableCoreContainer" Val="FALSE"/>
+    <Option Name="EnableResourceEstimation" Val="FALSE"/>
+    <Option Name="SimCompileState" Val="TRUE"/>
+    <Option Name="CreateRefXciForCoreContainers" Val="FALSE"/>
+    <Option Name="IPUserFilesDir" Val="$PIPUSERFILESDIR"/>
+    <Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/>
+    <Option Name="EnableBDX" Val="FALSE"/>
+    <Option Name="DSABoardId" Val="basys3"/>
+    <Option Name="WTXSimLaunchSim" Val="0"/>
+    <Option Name="WTModelSimLaunchSim" Val="0"/>
+    <Option Name="WTQuestaLaunchSim" Val="0"/>
+    <Option Name="WTIesLaunchSim" Val="0"/>
+    <Option Name="WTVcsLaunchSim" Val="0"/>
+    <Option Name="WTRivieraLaunchSim" Val="0"/>
+    <Option Name="WTActivehdlLaunchSim" Val="0"/>
+    <Option Name="WTXSimExportSim" Val="0"/>
+    <Option Name="WTModelSimExportSim" Val="0"/>
+    <Option Name="WTQuestaExportSim" Val="0"/>
+    <Option Name="WTIesExportSim" Val="0"/>
+    <Option Name="WTVcsExportSim" Val="0"/>
+    <Option Name="WTRivieraExportSim" Val="0"/>
+    <Option Name="WTActivehdlExportSim" Val="0"/>
+    <Option Name="GenerateIPUpgradeLog" Val="TRUE"/>
+    <Option Name="XSimRadix" Val="hex"/>
+    <Option Name="XSimTimeUnit" Val="ns"/>
+    <Option Name="XSimArrayDisplayLimit" Val="1024"/>
+    <Option Name="XSimTraceLimit" Val="65536"/>
+    <Option Name="SimTypes" Val="rtl"/>
+    <Option Name="SimTypes" Val="bfm"/>
+    <Option Name="SimTypes" Val="tlm"/>
+    <Option Name="SimTypes" Val="tlm_dpi"/>
+    <Option Name="MEMEnableMemoryMapGeneration" Val="TRUE"/>
+    <Option Name="DcpsUptoDate" Val="TRUE"/>
+    <Option Name="ClassicSocBoot" Val="FALSE"/>
+    <Option Name="LocalIPRepoLeafDirName" Val="ip_repo"/>
+  </Configuration>
+  <FileSets Version="1" Minor="31">
+    <FileSet Name="sources_1" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1" RelGenDir="$PGENDIR/sources_1">
+      <Filter Type="Srcs"/>
+      <Config>
+        <Option Name="DesignMode" Val="RTL"/>
+        <Option Name="TopAutoSet" Val="TRUE"/>
+      </Config>
+    </FileSet>
+    <FileSet Name="constrs_1" Type="Constrs" RelSrcDir="$PSRCDIR/constrs_1" RelGenDir="$PGENDIR/constrs_1">
+      <Filter Type="Constrs"/>
+      <Config>
+        <Option Name="ConstrsType" Val="XDC"/>
+      </Config>
+    </FileSet>
+    <FileSet Name="sim_1" Type="SimulationSrcs" RelSrcDir="$PSRCDIR/sim_1" RelGenDir="$PGENDIR/sim_1">
+      <Config>
+        <Option Name="DesignMode" Val="RTL"/>
+        <Option Name="TopAutoSet" Val="TRUE"/>
+        <Option Name="TransportPathDelay" Val="0"/>
+        <Option Name="TransportIntDelay" Val="0"/>
+        <Option Name="SelectedSimModel" Val="rtl"/>
+        <Option Name="PamDesignTestbench" Val=""/>
+        <Option Name="PamDutBypassFile" Val="xil_dut_bypass"/>
+        <Option Name="PamSignalDriverFile" Val="xil_bypass_driver"/>
+        <Option Name="PamPseudoTop" Val="pseudo_tb"/>
+        <Option Name="SrcSet" Val="sources_1"/>
+      </Config>
+    </FileSet>
+    <FileSet Name="utils_1" Type="Utils" RelSrcDir="$PSRCDIR/utils_1" RelGenDir="$PGENDIR/utils_1">
+      <Filter Type="Utils"/>
+      <Config>
+        <Option Name="TopAutoSet" Val="TRUE"/>
+      </Config>
+    </FileSet>
+  </FileSets>
+  <Simulators>
+    <Simulator Name="XSim">
+      <Option Name="Description" Val="Vivado Simulator"/>
+      <Option Name="CompiledLib" Val="0"/>
+    </Simulator>
+    <Simulator Name="ModelSim">
+      <Option Name="Description" Val="ModelSim Simulator"/>
+    </Simulator>
+    <Simulator Name="Questa">
+      <Option Name="Description" Val="Questa Advanced Simulator"/>
+    </Simulator>
+    <Simulator Name="Xcelium">
+      <Option Name="Description" Val="Xcelium Parallel Simulator"/>
+    </Simulator>
+    <Simulator Name="VCS">
+      <Option Name="Description" Val="Verilog Compiler Simulator (VCS)"/>
+    </Simulator>
+    <Simulator Name="Riviera">
+      <Option Name="Description" Val="Riviera-PRO Simulator"/>
+    </Simulator>
+  </Simulators>
+  <Runs Version="1" Minor="19">
+    <Run Id="synth_1" Type="Ft3:Synth" SrcSet="sources_1" Part="xc7a35tcpg236-1" ConstrsSet="constrs_1" Description="Vivado Synthesis Defaults" AutoIncrementalCheckpoint="true" WriteIncrSynthDcp="false" State="current" IncludeInArchive="true" IsChild="false" AutoIncrementalDir="$PSRCDIR/utils_1/imports/synth_1" AutoRQSDir="$PSRCDIR/utils_1/imports/synth_1">
+      <Strategy Version="1" Minor="2">
+        <StratHandle Name="Vivado Synthesis Defaults" Flow="Vivado Synthesis 2022">
+          <Desc>Vivado Synthesis Defaults</Desc>
+        </StratHandle>
+        <Step Id="synth_design"/>
+      </Strategy>
+      <ReportStrategy Name="Vivado Synthesis Default Reports" Flow="Vivado Synthesis 2022"/>
+      <Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
+      <RQSFiles/>
+    </Run>
+    <Run Id="impl_1" Type="Ft2:EntireDesign" Part="xc7a35tcpg236-1" ConstrsSet="constrs_1" Description="Default settings for Implementation." AutoIncrementalCheckpoint="false" WriteIncrSynthDcp="false" State="current" SynthRun="synth_1" IncludeInArchive="true" IsChild="false" GenFullBitstream="true" AutoIncrementalDir="$PSRCDIR/utils_1/imports/impl_1" AutoRQSDir="$PSRCDIR/utils_1/imports/impl_1">
+      <Strategy Version="1" Minor="2">
+        <StratHandle Name="Vivado Implementation Defaults" Flow="Vivado Implementation 2022">
+          <Desc>Default settings for Implementation.</Desc>
+        </StratHandle>
+        <Step Id="init_design"/>
+        <Step Id="opt_design"/>
+        <Step Id="power_opt_design"/>
+        <Step Id="place_design"/>
+        <Step Id="post_place_power_opt_design"/>
+        <Step Id="phys_opt_design"/>
+        <Step Id="route_design"/>
+        <Step Id="post_route_phys_opt_design"/>
+        <Step Id="write_bitstream"/>
+      </Strategy>
+      <ReportStrategy Name="Vivado Implementation Default Reports" Flow="Vivado Implementation 2022"/>
+      <Report Name="ROUTE_DESIGN.REPORT_METHODOLOGY" Enabled="1"/>
+      <RQSFiles/>
+    </Run>
+  </Runs>
+  <Board>
+    <Jumpers/>
+  </Board>
+  <DashboardSummary Version="1" Minor="0">
+    <Dashboards>
+      <Dashboard Name="default_dashboard">
+        <Gadgets>
+          <Gadget Name="drc_1" Type="drc" Version="1" Row="2" Column="0">
+            <GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_drc_0 "/>
+          </Gadget>
+          <Gadget Name="methodology_1" Type="methodology" Version="1" Row="2" Column="1">
+            <GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_methodology_0 "/>
+          </Gadget>
+          <Gadget Name="power_1" Type="power" Version="1" Row="1" Column="0">
+            <GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_power_0 "/>
+          </Gadget>
+          <Gadget Name="timing_1" Type="timing" Version="1" Row="0" Column="1">
+            <GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_route_report_timing_summary_0 "/>
+          </Gadget>
+          <Gadget Name="utilization_1" Type="utilization" Version="1" Row="0" Column="0">
+            <GadgetParam Name="REPORTS" Type="string_list" Value="synth_1#synth_1_synth_report_utilization_0 "/>
+            <GadgetParam Name="RUN.STEP" Type="string" Value="synth_design"/>
+            <GadgetParam Name="RUN.TYPE" Type="string" Value="synthesis"/>
+          </Gadget>
+          <Gadget Name="utilization_2" Type="utilization" Version="1" Row="1" Column="1">
+            <GadgetParam Name="REPORTS" Type="string_list" Value="impl_1#impl_1_place_report_utilization_0 "/>
+          </Gadget>
+        </Gadgets>
+      </Dashboard>
+      <CurrentDashboard>default_dashboard</CurrentDashboard>
+    </Dashboards>
+  </DashboardSummary>
+</Project>
diff --git a/docs/.gitignore b/docs/.gitignore
new file mode 100644
index 0000000..14ffb91
--- /dev/null
+++ b/docs/.gitignore
@@ -0,0 +1,5 @@
+*.html
+*.toc
+*.con
+*.pdf
+gen/paged.polyfill.js
diff --git a/docs/gen/doc.m4 b/docs/gen/doc.m4
new file mode 100644
index 0000000..5719b54
--- /dev/null
+++ b/docs/gen/doc.m4
@@ -0,0 +1,48 @@
+define(`docname',
+	ifelse(NAME, `pva', `Plan van aanpak',
+	       NAME, `pve', `Pakket van eisen',
+	       NAME, `research', `Research document',
+	       NAME, `design', `Design document',
+				 `UNKNOWN???'))dnl
+
+<!DOCTYPE html>
+<html lang="en-US">
+<link>
+	<meta charset="utf-8">
+	<style>undivert(`style.css')</style>
+	<script>undivert(`paged.polyfill.js')</script>
+	`<script defer>
+	window.onload = function() {
+		document.querySelectorAll("nav li").forEach(item => {
+			var heading = "";
+			var parent = item;
+			for (parent = item; parent.nodeName != "NAV"; parent = parent.parentNode) {
+				if (parent.nodeName != "LI") continue;
+				heading = parent.getAttribute("data-item-num") + "." + heading;
+			}
+
+			item.setAttribute("heading-num-fix", heading.substr(0, heading.length - 1));
+		});
+	}
+	</script>'
+</head>
+<body>
+	<div class="docintro">
+		<span class="left">
+			docname()<br/>
+			Project Domotica<br/>
+			esyscmd(`LANG="en_US.utf8" date "+%B %d, %Y"')
+		</span>
+		<span class="right">
+			Bjorn Martens <b>(???)</b><br/>
+			Frenk van de Nieuwegiessen <b>(???)</b><br/>
+			Joshua Regnier <b>(2183008)</b><br/>
+			Loek Le Blansch <b>(2180996)</b><br/>
+			Niels Stunnebrink <b>(2184532)</b>
+		</span>
+	</div>
+	<h1>Table of contents</h1>
+	undivert(NAME`.toc')
+	undivert(NAME`.con')
+</body>
+</html>
diff --git a/docs/gen/style.css b/docs/gen/style.css
new file mode 100644
index 0000000..7179ded
--- /dev/null
+++ b/docs/gen/style.css
@@ -0,0 +1,109 @@
+@media print {
+	@page {
+		size: A4;
+		margin: 1in;
+
+		@bottom-center {
+			content: counter(page);
+		}
+	}
+
+	html, body {
+		width: 100%;
+		margin: 0;
+		padding: 0;
+		overflow: visible;
+
+		font-family: "TeX Gyre Schola";
+		font-size: 11pt;
+	}
+
+	a {
+		text-decoration: none;
+		color: unset;
+		font-style: italic;
+	}
+
+	pre, code {
+		font-family: "JetBrainsMono Nerd Font";
+		font-size: 9pt;
+	}
+
+	figure {
+		text-align: center;
+	}
+
+	figcaption, p {
+		text-align: justify;
+		text-justify: auto;
+		hyphens: auto;
+	}
+
+	figcaption {
+		display: inline-block;
+		counter-increment: fig;
+	}
+
+	figcaption::before {
+		content: "Figure " counter(fig) ": ";
+	}
+
+	table {
+		border-collapse: collapse;
+		border-style: solid;
+		border-width: 0.7pt 0;
+		border-color: black;
+		margin: 1rem auto;
+	}
+
+	th, td {
+		padding: 2pt 6pt;
+	}
+
+	th {
+		border-bottom: 1pt solid black;
+	}
+
+	.docintro {
+		display: flex;
+		flex-direction: row;
+		justify-content: space-between;
+		margin: 0;
+	}
+
+	.docintro .left,
+	.docintro .right {
+		display: block;
+	}
+
+	.docintro .right {
+		text-align: right;
+	}
+
+	.pagebr {
+		break-before: page;
+	}
+
+	nav ol {
+		counter-reset: item;
+		list-style-type: none;
+	}
+
+	nav li {
+		position: relative;
+		counter-increment: item;
+	}
+
+	nav li::before {
+		position: absolute;
+		transform: translateX(-100%) translateX(-5pt);
+		left: 0;
+		content: attr(heading-num-fix);
+	}
+
+	img {
+		max-width: 13cm;
+		display: block;
+		margin: 0 auto;
+	}
+}
diff --git a/docs/makefile b/docs/makefile
new file mode 100644
index 0000000..e4fcb15
--- /dev/null
+++ b/docs/makefile
@@ -0,0 +1,32 @@
+PANDOC = pandoc
+M4 = m4
+RM = rm -f
+CHROME = chromium --headless --run-all-compositor-stages-before-draw --virtual-time-budget=10000 --print-to-pdf-no-header
+CURL = curl
+PUP = pup
+
+SRCS = $(wildcard *.md)
+HTML_T = $(SRCS:.md=.html)
+PDF_T = $(SRCS:.md=.pdf)
+
+.PRECIOUS: %.toc %.con
+
+all: $(HTML_T)
+
+gen/paged.polyfill.js:
+	$(CURL) -Ls https://unpkg.com/pagedjs/dist/paged.polyfill.js > $@
+
+%.con: %.md
+	$(PANDOC) $< --to=html > $@
+
+%.toc: %.md
+	$(PANDOC) $< -s --toc --to=html 2> /dev/null | $(PUP) '#TOC' | sed -r 's/<(.?)ul>/<\1ol>/g' > $@
+
+%.html: %.con %.toc gen/doc.m4 gen/paged.polyfill.js gen/style.css
+	$(M4) -Igen -DNAME=$(basename $<) gen/doc.m4 > $@
+
+%.pdf: %.html
+	$(CHROME) --print-to-pdf=$@ $< 2> /dev/null
+
+clean:
+	$(RM) $(HTML_T) $(PDF_T) *.toc *.con gen/paged.polyfill.js
diff --git a/docs/readme.md b/docs/readme.md
new file mode 100644
index 0000000..720672c
--- /dev/null
+++ b/docs/readme.md
@@ -0,0 +1,5 @@
+# docs
+
+this folder contains project documentation in markdown format. these documents
+can be compiled to html using the makefile in this folder.
+
diff --git a/license b/license
new file mode 100644
index 0000000..a86647f
--- /dev/null
+++ b/license
@@ -0,0 +1,21 @@
+MIT License
+
+Copyright (c) 2023 lonkaars
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.
diff --git a/readme.md b/readme.md
new file mode 100644
index 0000000..f0db3aa
--- /dev/null
+++ b/readme.md
@@ -0,0 +1,9 @@
+# Hooded Havoc: Miniboss Mania
+
+(working title)
+
+## hardware
+
+- stm32 (f091rc)
+- basys3 (xc7a35tcpg236-1)
+
diff --git a/scripts/compiledb-full-path-mingw.sh b/scripts/compiledb-full-path-mingw.sh
new file mode 100755
index 0000000..be45ca7
--- /dev/null
+++ b/scripts/compiledb-full-path-mingw.sh
@@ -0,0 +1,13 @@
+#!/bin/sh
+[ `uname -o` != "Msys" ] && exit
+
+COMPILEDB_FILE="$1"
+
+fixpath () {
+    NEW="C:/msys64`which $1`.exe"
+    sed "s#\"$1\",#\"$NEW\",#g" -i "$COMPILEDB_FILE"
+}
+
+fixpath arm-none-eabi-gcc
+fixpath arm-none-eabi-objcopy
+sed 's#"/\(.\)/#"\U\1:/#g' -i "$COMPILEDB_FILE"
\ No newline at end of file
diff --git a/scripts/install-msys2.ps1 b/scripts/install-msys2.ps1
new file mode 100644
index 0000000..e7e0472
--- /dev/null
+++ b/scripts/install-msys2.ps1
@@ -0,0 +1,3 @@
+Start-BitsTransfer -Source https://github.com/msys2/msys2-installer/releases/download/2022-09-04/msys2-x86_64-20220904.exe -Destination .\msys2-x86_64-latest.exe
+.\msys2-x86_64-latest.exe in --confirm-command --accept-messages --root C:/msys64
+Remove-Item .\msys2-x86_64-latest.exe
diff --git a/scripts/install-packages-mingw.sh b/scripts/install-packages-mingw.sh
new file mode 100755
index 0000000..9acb392
--- /dev/null
+++ b/scripts/install-packages-mingw.sh
@@ -0,0 +1,14 @@
+#!/bin/sh
+pacman --noconfirm --needed -Sy \
+    make git \
+    mingw-w64-x86_64-arm-none-eabi-gcc \
+    mingw-w64-x86_64-arm-none-eabi-gdb \
+    mingw-w64-x86_64-arm-none-eabi-newlib \
+    mingw-w64-x86_64-arm-none-eabi-binutils \
+    mingw-w64-x86_64-stlink \
+    mingw-w64-x86_64-gdb-multiarch \
+    python python-pip
+
+pip3 install compiledb
+
+printf "\n\n\ninstalling packages done!"
diff --git a/scripts/readme.md b/scripts/readme.md
new file mode 100644
index 0000000..d7b6fb2
--- /dev/null
+++ b/scripts/readme.md
@@ -0,0 +1,28 @@
+# scripts
+
+this subdirectory contains build toolchain setup and other auxiliary scripts
+
+## windows install
+
+right-click "install-msys2.ps1" and click "Run with PowerShell" in the context
+menu. this will open powershell, install msys2, and close the powershell window
+once it's done installing.
+
+open "MSYS2 MINGW64" from the windows start menu, and use the `cd` command to
+navigate to this folder. drive letters (`C:\`) are written like `/c/` in msys2,
+and paths use forward slashes instead of backward slashes. e.g. `cd
+/c/Users/Loek/Documents/project-weerstation/scripts`.
+
+run `sh install-packages-mingw.sh`, and wait for the text "installing packages
+done!" to appear.
+
+you've now installed the necessary tools to compile, upload and debug the stm32
+firmware. shortcuts for commonly used commands are implemented as visual studio
+code tasks, so you don't have to be a terminal ninja.
+
+### notes
+
+- if you're experiencing libusb-related issues while using st-link, try using
+  [zadig](https://zadig.akeo.ie/) to update the usb driver.
+- make sure to use the 64-bit version of msys2 (titled "MSYS2 MINGW64" in your
+  start menu)
diff --git a/shared/.gitignore b/shared/.gitignore
new file mode 100644
index 0000000..5761abc
--- /dev/null
+++ b/shared/.gitignore
@@ -0,0 +1 @@
+*.o
diff --git a/stm32/.gitignore b/stm32/.gitignore
new file mode 100644
index 0000000..312c0ff
--- /dev/null
+++ b/stm32/.gitignore
@@ -0,0 +1,3 @@
+*.o
+main.elf
+main.bin
diff --git a/stm32/FreeRTOSConfig.h b/stm32/FreeRTOSConfig.h
new file mode 100644
index 0000000..223cf8b
--- /dev/null
+++ b/stm32/FreeRTOSConfig.h
@@ -0,0 +1,128 @@
+/* USER CODE BEGIN Header */
+/*
+ * FreeRTOS Kernel V10.0.1
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+/* USER CODE END Header */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * These parameters and more are described within the 'configuration' section of the
+ * FreeRTOS API documentation available on the FreeRTOS.org web site.
+ *
+ * See http://www.freertos.org/a00110.html
+ *----------------------------------------------------------*/
+
+/* USER CODE BEGIN Includes */
+/* Section where include file can be added */
+/* USER CODE END Includes */
+
+/* Ensure definitions are only used by the compiler, and not by the assembler. */
+#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
+  #include <stdint.h>
+  extern uint32_t SystemCoreClock;
+  void xPortSysTickHandler(void);
+#endif
+#define configUSE_PREEMPTION                     1
+#define configSUPPORT_STATIC_ALLOCATION          1
+#define configSUPPORT_DYNAMIC_ALLOCATION         1
+#define configUSE_IDLE_HOOK                      0
+#define configUSE_TICK_HOOK                      0
+#define configCPU_CLOCK_HZ                       ( SystemCoreClock )
+#define configTICK_RATE_HZ                       ((TickType_t)1000)
+#define configMAX_PRIORITIES                     ( 56 )
+#define configMINIMAL_STACK_SIZE                 ((uint16_t)128)
+#define configTOTAL_HEAP_SIZE                    ((size_t)3072)
+#define configMAX_TASK_NAME_LEN                  ( 16 )
+#define configUSE_TRACE_FACILITY                 1
+#define configUSE_16_BIT_TICKS                   0
+#define configUSE_MUTEXES                        1
+#define configQUEUE_REGISTRY_SIZE                8
+#define configUSE_RECURSIVE_MUTEXES              1
+#define configUSE_COUNTING_SEMAPHORES            1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION  0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                    0
+#define configMAX_CO_ROUTINE_PRIORITIES          ( 2 )
+
+/* Software timer definitions. */
+#define configUSE_TIMERS                         1
+#define configTIMER_TASK_PRIORITY                ( 2 )
+#define configTIMER_QUEUE_LENGTH                 10
+#define configTIMER_TASK_STACK_DEPTH             256
+
+/* The following flag must be enabled only when using newlib */
+#define configUSE_NEWLIB_REENTRANT          1
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet            1
+#define INCLUDE_uxTaskPriorityGet           1
+#define INCLUDE_vTaskDelete                 1
+#define INCLUDE_vTaskCleanUpResources       0
+#define INCLUDE_vTaskSuspend                1
+#define INCLUDE_vTaskDelayUntil             1
+#define INCLUDE_vTaskDelay                  1
+#define INCLUDE_xTaskGetSchedulerState      1
+#define INCLUDE_xTimerPendFunctionCall      1
+#define INCLUDE_xQueueGetMutexHolder        1
+#define INCLUDE_uxTaskGetStackHighWaterMark 1
+#define INCLUDE_eTaskGetState               1
+
+/*
+ * The CMSIS-RTOS V2 FreeRTOS wrapper is dependent on the heap implementation used
+ * by the application thus the correct define need to be enabled below
+ */
+#define USE_FreeRTOS_HEAP_4
+
+/* Normal assert() semantics without relying on the provision of an assert.h
+header file. */
+/* USER CODE BEGIN 1 */
+#define configASSERT( x ) if ((x) == 0) {taskDISABLE_INTERRUPTS(); for( ;; );}
+/* USER CODE END 1 */
+
+/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
+standard names. */
+#define vPortSVCHandler    SVC_Handler
+#define xPortPendSVHandler PendSV_Handler
+
+/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
+              to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
+
+/* #define xPortSysTickHandler SysTick_Handler */
+
+/* USER CODE BEGIN Defines */
+/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
+/* USER CODE END Defines */
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/stm32/idle_task_static_memory.c b/stm32/idle_task_static_memory.c
new file mode 100644
index 0000000..0774224
--- /dev/null
+++ b/stm32/idle_task_static_memory.c
@@ -0,0 +1,18 @@
+#include "idle_task_static_memory.h"
+
+void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize ) {
+	static StaticTask_t xIdleTaskTCB;
+	static StackType_t uxIdleTaskStack[ configMINIMAL_STACK_SIZE ];
+	*ppxIdleTaskTCBBuffer = &xIdleTaskTCB;
+	*ppxIdleTaskStackBuffer = uxIdleTaskStack;
+	*pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
+}
+
+void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, StackType_t **ppxTimerTaskStackBuffer, uint32_t *pulTimerTaskStackSize ) {
+	static StaticTask_t xTimerTaskTCB;
+	static StackType_t uxTimerTaskStack[ configTIMER_TASK_STACK_DEPTH ];
+	*ppxTimerTaskTCBBuffer = &xTimerTaskTCB;
+	*ppxTimerTaskStackBuffer = uxTimerTaskStack;
+	*pulTimerTaskStackSize = configTIMER_TASK_STACK_DEPTH;
+}
+
diff --git a/stm32/idle_task_static_memory.h b/stm32/idle_task_static_memory.h
new file mode 100644
index 0000000..24712fa
--- /dev/null
+++ b/stm32/idle_task_static_memory.h
@@ -0,0 +1,8 @@
+#pragma once
+
+#include <FreeRTOS.h>
+#include <FreeRTOSConfig.h>
+#include <task.h>
+
+void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize);
+void vApplicationGetTimerTaskMemory(StaticTask_t ** ppxTimerTaskTCBBuffer, StackType_t ** ppxTimerTaskStackBuffer, uint32_t * pulTimerTaskStackSize);
diff --git a/stm32/lib/FreeRTOS-Kernel b/stm32/lib/FreeRTOS-Kernel
new file mode 160000
+Subproject a4b28e35103d699edf074dfff4835921b481b30
diff --git a/stm32/lib/STM32-base b/stm32/lib/STM32-base
new file mode 160000
+Subproject 02610b5a8cc3042a2a076771c3a38c6f68d26fc
diff --git a/stm32/lib/STM32-base-STM32Cube b/stm32/lib/STM32-base-STM32Cube
new file mode 160000
+Subproject 71bcfb75e9b3aadbfcb05b57148d995a7f340b4
diff --git a/stm32/main.c b/stm32/main.c
new file mode 100644
index 0000000..4722fe0
--- /dev/null
+++ b/stm32/main.c
@@ -0,0 +1,3 @@
+int main() {
+	while (1);
+}
diff --git a/stm32/makefile b/stm32/makefile
new file mode 100644
index 0000000..81f3ec9
--- /dev/null
+++ b/stm32/makefile
@@ -0,0 +1,105 @@
+CC = arm-none-eabi-gcc
+LD = arm-none-eabi-gcc
+OC = arm-none-eabi-objcopy
+OS = arm-none-eabi-size
+RM = rm -f
+
+TARGET = main
+
+HOST=$(strip $(shell uname -o))
+
+SHARED_FLAGS += -g
+SHARED_FLAGS += -DSTM32F091xC
+SHARED_FLAGS += -Wall
+SHARED_FLAGS += -Wextra
+# SHARED_FLAGS += -Wno-register
+SHARED_FLAGS += -Wa,--defsym,CALL_ARM_SYSTEM_INIT=1
+SHARED_FLAGS += -I./lib/STM32-base-STM32Cube/HAL/STM32F0xx/inc
+SHARED_FLAGS += -I./lib/STM32-base-STM32Cube/HAL/STM32F0xx/inc/Legacy
+SHARED_FLAGS += -I./lib/STM32-base-STM32Cube/CMSIS/ARM/inc
+SHARED_FLAGS += -I./lib/STM32-base-STM32Cube/CMSIS/STM32F0xx/inc
+SHARED_FLAGS += -I./lib/STM32-base/startup
+SHARED_FLAGS += -I./lib/FreeRTOS-Kernel/include
+SHARED_FLAGS += -I./lib/FreeRTOS-Kernel/portable/GCC/ARM_CM0/
+SHARED_FLAGS += -I.
+ifeq ($(HOST),GNU/Linux)
+SHARED_FLAGS += -I/usr/arm-none-eabi/include/
+endif
+# SHARED_FLAGS += -O1
+SHARED_FLAGS += -ffunction-sections
+SHARED_FLAGS += -fdata-sections
+SHARED_FLAGS += -Wl,--gc-sections
+SHARED_FLAGS += -mlittle-endian
+SHARED_FLAGS += -mthumb
+SHARED_FLAGS += -specs=nosys.specs
+SHARED_FLAGS += -fno-exceptions
+SHARED_FLAGS += -fno-unwind-tables
+SHARED_FLAGS += -Wl,-L./lib/STM32-base/linker,-T./lib/STM32-base/linker/STM32F0xx/STM32F091xC.ld
+SHARED_FLAGS += -mcpu=cortex-m0
+SHARED_FLAGS += -march=armv6-m
+
+CFLAGS += $(SHARED_FLAGS)
+LFLAGS += $(SHARED_FLAGS)
+AFLAGS += $(SHARED_FLAGS)
+
+OBJS += lib/STM32-base/startup/STM32F0xx/STM32F091xC.o
+OBJS += lib/STM32-base-STM32Cube/CMSIS/STM32F0xx/src/system_stm32f0xx.o
+OBJS += lib/FreeRTOS-Kernel/croutine.o \
+        lib/FreeRTOS-Kernel/event_groups.o \
+        lib/FreeRTOS-Kernel/list.o \
+        lib/FreeRTOS-Kernel/queue.o \
+        lib/FreeRTOS-Kernel/stream_buffer.o \
+        lib/FreeRTOS-Kernel/tasks.o \
+        lib/FreeRTOS-Kernel/timers.o \
+        lib/FreeRTOS-Kernel/portable/GCC/ARM_CM0/port.o \
+        lib/FreeRTOS-Kernel/portable/MemMang/heap_4.o
+OBJS += lib/STM32-base-STM32Cube/HAL/STM32F0xx/src/stm32f0xx_hal_rcc.o \
+        lib/STM32-base-STM32Cube/HAL/STM32F0xx/src/stm32f0xx_hal_rcc_ex.o \
+        lib/STM32-base-STM32Cube/HAL/STM32F0xx/src/stm32f0xx_hal.o \
+        lib/STM32-base-STM32Cube/HAL/STM32F0xx/src/stm32f0xx_hal_i2c.o \
+        lib/STM32-base-STM32Cube/HAL/STM32F0xx/src/stm32f0xx_hal_i2c_ex.o \
+        lib/STM32-base-STM32Cube/HAL/STM32F0xx/src/stm32f0xx_hal_gpio.o \
+        lib/STM32-base-STM32Cube/HAL/STM32F0xx/src/stm32f0xx_hal_dma.o \
+        lib/STM32-base-STM32Cube/HAL/STM32F0xx/src/stm32f0xx_hal_cortex.o \
+        lib/STM32-base-STM32Cube/HAL/STM32F0xx/src/stm32f0xx_hal_pwr.o \
+        lib/STM32-base-STM32Cube/HAL/STM32F0xx/src/stm32f0xx_hal_pwr_ex.o \
+        lib/STM32-base-STM32Cube/HAL/STM32F0xx/src/stm32f0xx_hal_flash.o \
+        lib/STM32-base-STM32Cube/HAL/STM32F0xx/src/stm32f0xx_hal_flash_ex.o \
+        lib/STM32-base-STM32Cube/HAL/STM32F0xx/src/stm32f0xx_hal_tim.o \
+        lib/STM32-base-STM32Cube/HAL/STM32F0xx/src/stm32f0xx_hal_tim_ex.o \
+        lib/STM32-base-STM32Cube/HAL/STM32F0xx/src/stm32f0xx_hal_uart.o \
+        lib/STM32-base-STM32Cube/HAL/STM32F0xx/src/stm32f0xx_hal_uart_ex.o
+OBJS += idle_task_static_memory.o
+OBJS += main.o
+
+.PHONY: flash clean
+
+$(TARGET).bin: $(TARGET).elf
+	$(OC) -O binary $< $@
+	$(OS) $<
+
+%.o: %.s
+	$(CC) -c $(AFLAGS) $< -o $@
+
+lib/%.o: lib/%.c
+	$(CC) -c $(CFLAGS) -w $< -o $@
+
+%.o: %.c
+	$(CC) -c $(CFLAGS) $< -o $@
+
+%-stm.o: %.c
+	$(CC) -c $(CFLAGS) $< -o $@
+
+$(TARGET).elf: $(OBJS)
+	$(LD) $(LFLAGS) $^ -o $@
+
+flash: $(TARGET).bin
+	st-flash --reset write $(TARGET).bin 0x08000000
+
+compile_commands: clean
+	compiledb make -Bn
+	../scripts/compiledb-full-path-mingw.sh compile_commands.json
+
+clean:
+	$(RM) $(TARGET).bin $(TARGET).elf $(OBJS)
+
diff --git a/stm32/stm32f0xx_hal_conf.h b/stm32/stm32f0xx_hal_conf.h
new file mode 100644
index 0000000..fc27221
--- /dev/null
+++ b/stm32/stm32f0xx_hal_conf.h
@@ -0,0 +1,117 @@
+#pragma once
+
+#define HSE_VALUE ((uint32_t)8000000)
+#define HSE_STARTUP_TIMEOUT ((uint32_t)100)
+#define HSI_VALUE ((uint32_t)8000000)
+#define HSI_STARTUP_TIMEOUT ((uint32_t)5000)
+#define HSI14_VALUE ((uint32_t)14000000)
+#define HSI48_VALUE ((uint32_t)48000000)
+#define LSI_VALUE ((uint32_t)40000)
+#define LSE_VALUE ((uint32_t)32768)
+#define LSE_STARTUP_TIMEOUT ((uint32_t)5000)
+
+#define VDD_VALUE 3300U
+#define TICK_INT_PRIORITY ((uint32_t)(1U<<__NVIC_PRIO_BITS) - 1U)
+
+#define USE_RTOS 0U
+#define PREFETCH_ENABLE 1U
+#define INSTRUCTION_CACHE_ENABLE 0U
+#define DATA_CACHE_ENABLE 0U
+#define USE_SPI_CRC 0U
+
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_TIM_MODULE_ENABLED
+#define HAL_UART_MODULE_ENABLED
+
+#ifdef HAL_RCC_MODULE_ENABLED
+#include <stm32f0xx_hal_rcc.h>
+#endif
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include <stm32f0xx_hal_gpio.h>
+#endif
+#ifdef HAL_DMA_MODULE_ENABLED
+#include <stm32f0xx_hal_dma.h>
+#endif
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include <stm32f0xx_hal_cortex.h>
+#endif
+#ifdef HAL_ADC_MODULE_ENABLED
+#include <stm32f0xx_hal_adc.h>
+#endif
+#ifdef HAL_CAN_MODULE_ENABLED
+#include <stm32f0xx_hal_can.h>
+#endif
+#ifdef HAL_CEC_MODULE_ENABLED
+#include <stm32f0xx_hal_cec.h>
+#endif
+#ifdef HAL_COMP_MODULE_ENABLED
+#include <stm32f0xx_hal_comp.h>
+#endif
+#ifdef HAL_CRC_MODULE_ENABLED
+#include <stm32f0xx_hal_crc.h>
+#endif
+#ifdef HAL_DAC_MODULE_ENABLED
+#include <stm32f0xx_hal_dac.h>
+#endif
+#ifdef HAL_FLASH_MODULE_ENABLED
+#include <stm32f0xx_hal_flash.h>
+#endif
+#ifdef HAL_I2C_MODULE_ENABLED
+#include <stm32f0xx_hal_i2c.h>
+#endif
+#ifdef HAL_I2S_MODULE_ENABLED
+#include <stm32f0xx_hal_i2s.h>
+#endif
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include <stm32f0xx_hal_irda.h>
+#endif
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include <stm32f0xx_hal_iwdg.h>
+#endif
+#ifdef HAL_PCD_MODULE_ENABLED
+#include <stm32f0xx_hal_pcd.h>
+#endif
+#ifdef HAL_PWR_MODULE_ENABLED
+#include <stm32f0xx_hal_pwr.h>
+#endif
+#ifdef HAL_RTC_MODULE_ENABLED
+#include <stm32f0xx_hal_rtc.h>
+#endif
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include <stm32f0xx_hal_smartcard.h>
+#endif
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include <stm32f0xx_hal_smbus.h>
+#endif
+#ifdef HAL_SPI_MODULE_ENABLED
+#include <stm32f0xx_hal_spi.h>
+#endif
+#ifdef HAL_TIM_MODULE_ENABLED
+#include <stm32f0xx_hal_tim.h>
+#endif
+#ifdef HAL_TSC_MODULE_ENABLED
+#include <stm32f0xx_hal_tsc.h>
+#endif
+#ifdef HAL_UART_MODULE_ENABLED
+#include <stm32f0xx_hal_uart.h>
+#endif
+#ifdef HAL_USART_MODULE_ENABLED
+#include <stm32f0xx_hal_usart.h>
+#endif
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include <stm32f0xx_hal_wwdg.h>
+#endif
+
+#ifdef USE_FULL_ASSERT
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__))
+void assert_failed(char* file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif