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authorlonkaars <loek@pipeframe.xyz>2023-03-18 16:21:33 +0100
committerlonkaars <loek@pipeframe.xyz>2023-03-18 16:21:33 +0100
commit0a3fa36366c8314c4dbc02ecdbb6d80b7104af2c (patch)
tree85a09e55f3bd1e625ac8c1e1d8da2b8fcd241661 /src
parent77fcfec599d7b793ea9aefb119513ec3f197e792 (diff)
raw pwm output instead of 8-bit unsigned pcm
Diffstat (limited to 'src')
-rw-r--r--src/main-eindopdracht.vhd20
-rw-r--r--src/note-synth.vhd4
2 files changed, 4 insertions, 20 deletions
diff --git a/src/main-eindopdracht.vhd b/src/main-eindopdracht.vhd
index 9b4a22e..c855373 100644
--- a/src/main-eindopdracht.vhd
+++ b/src/main-eindopdracht.vhd
@@ -16,16 +16,6 @@ entity top is port (
end top;
architecture Behavioral of top is
- component AudioOut
- generic (
- INPUT_DEPTH: integer := 256;
- INPUT_AUDIO_HZ: integer := 44100;
- INPUT_CLK_HZ: integer := 100000000);
- port (
- reset, clk : in std_logic;
- inMusicData : in std_logic_vector(7 downto 0);
- outMusic : out std_logic);
- end component;
component pixclkgen is port (
vga_pixel_clk : out std_logic;
reset : in std_logic;
@@ -74,7 +64,7 @@ architecture Behavioral of top is
NOTE_IDX: in std_logic_vector(3 downto 0); -- note index
NOTE_WRONG: in std_logic; -- note wrong
NOTE_PLAY: in std_logic; -- output audio
- AUDIO_LEVEL: out std_logic_vector(7 downto 0)); -- audio signal level
+ PWM_OUT: out std_logic); -- audio signal level
end component;
signal SYNC_DAT: std_logic_vector(7 downto 0); -- ps2sync <-> scancodefilter
@@ -112,13 +102,7 @@ begin
NOTE_IDX => NOTE_IDX,
NOTE_WRONG => NOTE_WRONG,
NOTE_PLAY => NOTE_PLAY,
- AUDIO_LEVEL => AUDIO_SIGNAL);
-
- audio_pwm: AudioOut port map (
- reset => SYSRESET,
- clk => SYSCLK,
- inMusicData => AUDIO_SIGNAL,
- outMusic => PWM_OUT_TEMP);
+ PWM_OUT => PWM_OUT_TEMP);
PWM_OUT <= PWM_OUT_TEMP and GLOBAL_MUTE;
diff --git a/src/note-synth.vhd b/src/note-synth.vhd
index 1a0a9ba..5ae9052 100644
--- a/src/note-synth.vhd
+++ b/src/note-synth.vhd
@@ -9,10 +9,10 @@ entity note_synth is port(
NOTE_IDX: in std_logic_vector(3 downto 0); -- note index
NOTE_WRONG: in std_logic; -- note wrong
NOTE_PLAY: in std_logic; -- output audio
- AUDIO_LEVEL: out std_logic_vector(7 downto 0)); -- audio signal level
+ PWM_OUT: out std_logic); -- audio signal level
end note_synth;
architecture Behavioral of note_synth is
begin
- AUDIO_LEVEL <= (others => '0');
+ PWM_OUT <= '0';
end Behavioral;