| Commit message (Expand) | Author | Age |
* | fix copyright headers | Arisotura | 2022-03-07 |
* | update copyright headers | Arisotura | 2022-01-09 |
* | decouple JIT from Config. bahahahahah | Arisotura | 2021-11-17 |
* | support allocating more registers for aarch64 JIT | RSDuck | 2021-06-29 |
* | update copyright year and add missing GPL headers | RSDuck | 2021-03-12 |
* | implement carry setting ALU op with imm | RSDuck | 2020-07-25 |
* | first steps in bringing over the JIT refactor/fastmem | RSDuck | 2020-06-16 |
* | rewrite JIT memory emulation | RSDuck | 2020-05-09 |
* | implement msr and mrs for the x64 JIT | RSDuck | 2020-04-26 |
* | move ARM64 JIT backend here | RSDuck | 2020-04-26 |
* | improve nop handling and proper behaviour for LDM^ | RSDuck | 2020-04-26 |
* | integrate changes from ARM64 backend and more | RSDuck | 2020-04-26 |
* | decrease jit block cache address granularity | RSDuck | 2020-04-26 |
* | new block cache and much more... | RSDuck | 2020-04-26 |
* | more fixes for flag optimisation | RSDuck | 2020-04-26 |
* | fixes for flag optimisation | RSDuck | 2020-04-26 |
* | optimise away unneeded flag sets | RSDuck | 2020-04-26 |
* | fix register alloc for half word loads | RSDuck | 2020-04-26 |
* | jit: fix thumb hi reg alu and mcr halt | RSDuck | 2020-04-26 |
* | jit: fix misc static branch things | RSDuck | 2020-04-26 |
* | jit: fix BLX_reg with rn=lr | RSDuck | 2020-04-26 |
* | jit: branch instructions | RSDuck | 2020-04-26 |
* | jit: thumb block transfer working | RSDuck | 2020-04-26 |
* | JIT: most mem instructions working | RSDuck | 2020-04-26 |
* | JIT: base | RSDuck | 2020-04-26 |