diff options
| author | Arisotura <thetotalworm@gmail.com> | 2021-11-17 18:15:50 +0100 | 
|---|---|---|
| committer | Arisotura <thetotalworm@gmail.com> | 2021-11-17 18:15:50 +0100 | 
| commit | c1dcd585be0d7789bf68f098c443b7cadff28965 (patch) | |
| tree | 9c467b7397fe4f1d67abca2fc3a4bb12bfd670ee /src/ARM_InstrInfo.cpp | |
| parent | 53dfcfb18a0a438ae04be3141ae446e4e43c610a (diff) | |
decouple JIT from Config. bahahahahah
Diffstat (limited to 'src/ARM_InstrInfo.cpp')
| -rw-r--r-- | src/ARM_InstrInfo.cpp | 18 | 
1 files changed, 9 insertions, 9 deletions
diff --git a/src/ARM_InstrInfo.cpp b/src/ARM_InstrInfo.cpp index 535436c..afd11da 100644 --- a/src/ARM_InstrInfo.cpp +++ b/src/ARM_InstrInfo.cpp @@ -20,7 +20,7 @@  #include <stdio.h> -#include "Config.h" +#include "ARMJIT.h"  namespace ARMInstrInfo  { @@ -230,7 +230,7 @@ enum {      T_SetMaybeC     = 1 << 17,      T_ReadC         = 1 << 18,      T_SetC          = 1 << 19, -     +      T_WriteMem      = 1 << 20,      T_LoadMem       = 1 << 21,  }; @@ -345,7 +345,7 @@ Info Decode(bool thumb, u32 num, u32 instr)              res.DstRegs |= 1 << (instr & 0x7);          if (data & T_Write8)              res.DstRegs |= 1 << ((instr >> 8) & 0x7); -         +          if (data & T_ReadHi0)              res.SrcRegs |= 1 << ((instr & 0x7) | ((instr >> 4) & 0x8));          if (data & T_ReadHi3) @@ -381,12 +381,12 @@ Info Decode(bool thumb, u32 num, u32 instr)          if (data & T_WriteMem)              res.SpecialKind = special_WriteMem; -         +          if (data & T_LoadMem)          {              if (res.Kind == tk_LDR_PCREL)              { -                if (!Config::JIT_LiteralOptimisations) +                if (!ARMJIT::LiteralOptimizations)                      res.SrcRegs |= 1 << 15;                  res.SpecialKind = special_LoadLiteral;              } @@ -471,18 +471,18 @@ Info Decode(bool thumb, u32 num, u32 instr)              res.SrcRegs |= 1 << ((instr >> 8) & 0xF);          if (data & A_Read12)              res.SrcRegs |= 1 << ((instr >> 12) & 0xF); -         +          if (data & A_Write12)              res.DstRegs |= 1 << ((instr >> 12) & 0xF);          if (data & A_Write16)              res.DstRegs |= 1 << ((instr >> 16) & 0xF); -         +          if (data & A_MemWriteback && instr & (1 << 21))              res.DstRegs |= 1 << ((instr >> 16) & 0xF);          if (data & A_BranchAlways)              res.DstRegs |= 1 << 15; -         +          if (data & A_Read12Double)          {              res.SrcRegs |= 1 << ((instr >> 12) & 0xF); @@ -530,7 +530,7 @@ Info Decode(bool thumb, u32 num, u32 instr)              else                  res.SpecialKind = special_LoadMem;          } -         +          if (res.Kind == ak_LDM)          {              u16 set = (instr & 0xFFFF);  |