less amnesia! ITCM, DTCM, corresponding CP15 support

1 files changed, 120 insertions, 1 deletions

diff --git a/NDS.cpp b/NDS.cpp
index ed573cb..7cf00b0 100644
--- a/NDS.cpp
+++ b/NDS.cpp
@@ -2,6 +2,7 @@
 #include <string.h>
 #include "NDS.h"
 #include "ARM.h"
+#include "CP15.h"
 
 
 namespace NDS
@@ -16,8 +17,17 @@ u8 ARM9BIOS[0x1000];
 u8 ARM7BIOS[0x4000];
 
 u8 MainRAM[0x400000];
+
 u8 ARM7WRAM[0x10000];
 
+u8 ARM9ITCM[0x8000];
+u32 ARM9ITCMSize;
+u8 ARM9DTCM[0x4000];
+u32 ARM9DTCMBase, ARM9DTCMSize;
+
+// IO shit
+u16 IPCSync9, IPCSync7;
+
 bool Running;
 
 
@@ -59,9 +69,19 @@ void Reset()
 
     memset(MainRAM, 0, 0x400000);
     memset(ARM7WRAM, 0, 0x10000);
+    memset(ARM9ITCM, 0, 0x8000);
+    memset(ARM9DTCM, 0, 0x4000);
+
+    ARM9ITCMSize = 0;
+    ARM9DTCMBase = 0xFFFFFFFF;
+    ARM9DTCMSize = 0;
+
+    IPCSync9 = 0;
+    IPCSync7 = 0;
 
     ARM9->Reset();
     ARM7->Reset();
+    CP15::Reset();
 
     ARM9Cycles = 0;
     ARM7Cycles = 0;
@@ -99,6 +119,14 @@ u8 ARM9Read8(u32 addr)
     {
         return *(u8*)&ARM9BIOS[addr & 0xFFF];
     }
+    if (addr < ARM9ITCMSize)
+    {
+        return *(u8*)&ARM9ITCM[addr & 0x7FFF];
+    }
+    if (addr >= ARM9DTCMBase && addr < (ARM9DTCMBase + ARM9DTCMSize))
+    {
+        return *(u8*)&ARM9DTCM[(addr - ARM9DTCMBase) & 0x3FFF];
+    }
 
     switch (addr & 0xFF000000)
     {
@@ -116,11 +144,25 @@ u16 ARM9Read16(u32 addr)
     {
         return *(u16*)&ARM9BIOS[addr & 0xFFF];
     }
+    if (addr < ARM9ITCMSize)
+    {
+        return *(u16*)&ARM9ITCM[addr & 0x7FFF];
+    }
+    if (addr >= ARM9DTCMBase && addr < (ARM9DTCMBase + ARM9DTCMSize))
+    {
+        return *(u16*)&ARM9DTCM[(addr - ARM9DTCMBase) & 0x3FFF];
+    }
 
     switch (addr & 0xFF000000)
     {
     case 0x02000000:
         return *(u16*)&MainRAM[addr & 0x3FFFFF];
+
+    case 0x04000000:
+        switch (addr)
+        {
+        case 0x04000180: return IPCSync9;
+        }
     }
 
     printf("unknown arm9 read16 %08X\n", addr);
@@ -133,6 +175,14 @@ u32 ARM9Read32(u32 addr)
     {
         return *(u32*)&ARM9BIOS[addr & 0xFFF];
     }
+    if (addr < ARM9ITCMSize)
+    {
+        return *(u32*)&ARM9ITCM[addr & 0x7FFF];
+    }
+    if (addr >= ARM9DTCMBase && addr < (ARM9DTCMBase + ARM9DTCMSize))
+    {
+        return *(u32*)&ARM9DTCM[(addr - ARM9DTCMBase) & 0x3FFF];
+    }
 
     switch (addr & 0xFF000000)
     {
@@ -146,6 +196,17 @@ u32 ARM9Read32(u32 addr)
 
 void ARM9Write8(u32 addr, u8 val)
 {
+    if (addr < ARM9ITCMSize)
+    {
+        *(u8*)&ARM9ITCM[addr & 0x7FFF] = val;
+        return;
+    }
+    if (addr >= ARM9DTCMBase && addr < (ARM9DTCMBase + ARM9DTCMSize))
+    {
+        *(u8*)&ARM9DTCM[(addr - ARM9DTCMBase) & 0x3FFF] = val;
+        return;
+    }
+
     switch (addr & 0xFF000000)
     {
     case 0x02000000:
@@ -158,11 +219,37 @@ void ARM9Write8(u32 addr, u8 val)
 
 void ARM9Write16(u32 addr, u16 val)
 {
+    if (addr < ARM9ITCMSize)
+    {
+        *(u16*)&ARM9ITCM[addr & 0x7FFF] = val;
+        return;
+    }
+    if (addr >= ARM9DTCMBase && addr < (ARM9DTCMBase + ARM9DTCMSize))
+    {
+        *(u16*)&ARM9DTCM[(addr - ARM9DTCMBase) & 0x3FFF] = val;
+        return;
+    }
+
     switch (addr & 0xFF000000)
     {
     case 0x02000000:
         *(u16*)&MainRAM[addr & 0x3FFFFF] = val;
         return;
+
+    case 0x04000000:
+        switch (addr)
+        {
+        case 0x04000180:
+            IPCSync7 &= 0xFFF0;
+            IPCSync7 |= ((val & 0x0F00) >> 8);
+            IPCSync9 &= 0xB0FF;
+            IPCSync9 |= (val & 0x4F00);
+            if ((val & 0x2000) && (IPCSync7 & 0x4000))
+            {
+                printf("ARM9 IPCSYNC IRQ TODO\n");
+            }
+            return;
+        }
     }
 
     printf("unknown arm9 write16 %08X %04X\n", addr, val);
@@ -170,6 +257,17 @@ void ARM9Write16(u32 addr, u16 val)
 
 void ARM9Write32(u32 addr, u32 val)
 {
+    if (addr < ARM9ITCMSize)
+    {
+        *(u32*)&ARM9ITCM[addr & 0x7FFF] = val;
+        return;
+    }
+    if (addr >= ARM9DTCMBase && addr < (ARM9DTCMBase + ARM9DTCMSize))
+    {
+        *(u32*)&ARM9DTCM[(addr - ARM9DTCMBase) & 0x3FFF] = val;
+        return;
+    }
+
     switch (addr & 0xFF000000)
     {
     case 0x02000000:
@@ -177,7 +275,7 @@ void ARM9Write32(u32 addr, u32 val)
         return;
     }
 
-    printf("unknown arm9 write32 %08X %08X\n", addr, val);
+    printf("unknown arm9 write32 %08X %08X | %08X\n", addr, val, ARM9->R[15]);
 }
 
 
@@ -216,6 +314,12 @@ u16 ARM7Read16(u32 addr)
 
     case 0x03800000:
         return *(u16*)&ARM7WRAM[addr & 0xFFFF];
+
+    case 0x04000000:
+        switch (addr)
+        {
+        case 0x04000180: return IPCSync7;
+        }
     }
 
     printf("unknown arm7 read16 %08X\n", addr);
@@ -269,6 +373,21 @@ void ARM7Write16(u32 addr, u16 val)
     case 0x03800000:
         *(u16*)&ARM7WRAM[addr & 0xFFFF] = val;
         return;
+
+    case 0x04000000:
+        switch (addr)
+        {
+        case 0x04000180:
+            IPCSync9 &= 0xFFF0;
+            IPCSync9 |= ((val & 0x0F00) >> 8);
+            IPCSync7 &= 0xB0FF;
+            IPCSync7 |= (val & 0x4F00);
+            if ((val & 0x2000) && (IPCSync9 & 0x4000))
+            {
+                printf("ARM7 IPCSYNC IRQ TODO\n");
+            }
+            return;
+        }
     }
 
     printf("unknown arm7 write16 %08X %04X\n", addr, val);