1 files changed, 47 insertions, 3 deletions
diff --git a/basys3/basys3.srcs/io.xdc b/basys3/basys3.srcs/io.xdc
index fa1dbd0..3a8966a 100644
--- a/basys3/basys3.srcs/io.xdc
+++ b/basys3/basys3.srcs/io.xdc
@@ -1,6 +1,50 @@
-set_property PACKAGE_PIN A15 [get_ports SPI_CLK]
-set_property PACKAGE_PIN C15 [get_ports SPI_CS]
-set_property PACKAGE_PIN A17 [get_ports SPI_MOSI]
 set_property IOSTANDARD LVCMOS33 [get_ports SPI_MOSI]
 set_property IOSTANDARD LVCMOS33 [get_ports SPI_CS]
 set_property IOSTANDARD LVCMOS33 [get_ports SPI_CLK]
+
+set_property PACKAGE_PIN A15 [get_ports SPI_CLK]
+set_property PACKAGE_PIN C15 [get_ports SPI_CS]
+set_property PACKAGE_PIN A17 [get_ports SPI_MOSI]
+
+set_property IOSTANDARD LVCMOS33 [get_ports SYSCLK]
+set_property IOSTANDARD LVCMOS33 [get_ports RESET]
+set_property IOSTANDARD LVCMOS33 [get_ports HSYNC]
+set_property IOSTANDARD LVCMOS33 [get_ports VSYNC]
+
+set_property PACKAGE_PIN W5 [get_ports SYSCLK]
+set_property PACKAGE_PIN T18 [get_ports RESET]
+set_property PACKAGE_PIN P19 [get_ports HSYNC]
+set_property PACKAGE_PIN R19 [get_ports VSYNC]
+
+set_property IOSTANDARD LVCMOS33 [get_ports {R[3]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {R[2]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {R[1]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {R[0]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {G[3]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {G[2]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {G[1]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {G[0]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {B[3]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {B[2]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {B[1]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {B[0]}]
+
+set_property PACKAGE_PIN N19 [get_ports {R[3]}]
+set_property PACKAGE_PIN J19 [get_ports {R[2]}]
+set_property PACKAGE_PIN H19 [get_ports {R[1]}]
+set_property PACKAGE_PIN G19 [get_ports {R[0]}]
+set_property PACKAGE_PIN D17 [get_ports {G[3]}]
+set_property PACKAGE_PIN G17 [get_ports {G[2]}]
+set_property PACKAGE_PIN H17 [get_ports {G[1]}]
+set_property PACKAGE_PIN J17 [get_ports {G[0]}]
+set_property PACKAGE_PIN J18 [get_ports {B[3]}]
+set_property PACKAGE_PIN K18 [get_ports {B[2]}]
+set_property PACKAGE_PIN L18 [get_ports {B[1]}]
+set_property PACKAGE_PIN N18 [get_ports {B[0]}]
+
+set_property IOSTANDARD LVCMOS33 [get_ports VBLANK]
+set_property IOSTANDARD LVCMOS33 [get_ports WEN]
+
+set_property PACKAGE_PIN C16 [get_ports VBLANK]
+set_property PACKAGE_PIN V13 [get_ports WEN]
+