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authorlonkaars <loek@pipeframe.xyz>2023-04-04 16:24:10 +0200
committerlonkaars <loek@pipeframe.xyz>2023-04-04 16:24:10 +0200
commit9c0a8622c26743583966b653704d5bfc8b4c0c7d (patch)
tree83b87ced77ed8742ba6d6e4f55e6ddcb8915966a /test/conntest/conntest.srcs
parentd924eaf44e12cdc7a438a08695f8602993693c98 (diff)
full ppu IO in stm code (h/vblank interrupts)
Diffstat (limited to 'test/conntest/conntest.srcs')
-rw-r--r--test/conntest/conntest.srcs/io.xdc94
-rw-r--r--test/conntest/conntest.srcs/top.vhd32
2 files changed, 126 insertions, 0 deletions
diff --git a/test/conntest/conntest.srcs/io.xdc b/test/conntest/conntest.srcs/io.xdc
new file mode 100644
index 0000000..ae8e63d
--- /dev/null
+++ b/test/conntest/conntest.srcs/io.xdc
@@ -0,0 +1,94 @@
+set_property IOSTANDARD LVCMOS33 [get_ports SPI_MOSI]
+set_property PACKAGE_PIN L2 [get_ports SPI_MOSI]
+
+set_property PACKAGE_PIN J2 [get_ports SPI_CLK]
+set_property IOSTANDARD LVCMOS33 [get_ports SPI_CLK]
+
+set_property IOSTANDARD LVCMOS33 [get_ports SPI_SR]
+set_property PACKAGE_PIN H1 [get_ports SPI_SR]
+set_property PULLDOWN true [get_ports SPI_SR]
+
+
+
+set_property IOSTANDARD LVCMOS33 [get_ports HBLANK]
+set_property PACKAGE_PIN K2 [get_ports HBLANK]
+
+set_property IOSTANDARD LVCMOS33 [get_ports VBLANK]
+set_property PACKAGE_PIN J1 [get_ports VBLANK]
+
+
+
+set_property IOSTANDARD LVCMOS33 [get_ports SYSCLK]
+set_property PACKAGE_PIN W5 [get_ports SYSCLK]
+
+set_property IOSTANDARD LVCMOS33 [get_ports RESET]
+set_property PACKAGE_PIN T18 [get_ports RESET]
+
+set_property IOSTANDARD LVCMOS33 [get_ports DBG_DISP_ADDR]
+set_property PACKAGE_PIN R2 [get_ports DBG_DISP_ADDR]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_LEDS_OUT[15]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_LEDS_OUT[14]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_LEDS_OUT[13]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_LEDS_OUT[12]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_LEDS_OUT[11]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_LEDS_OUT[10]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_LEDS_OUT[8]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_LEDS_OUT[9]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_LEDS_OUT[7]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_LEDS_OUT[6]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_LEDS_OUT[5]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_LEDS_OUT[4]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_LEDS_OUT[3]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_LEDS_OUT[2]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_LEDS_OUT[1]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_LEDS_OUT[0]}]
+set_property PACKAGE_PIN L1 [get_ports {DBG_LEDS_OUT[15]}]
+set_property PACKAGE_PIN P1 [get_ports {DBG_LEDS_OUT[14]}]
+set_property PACKAGE_PIN N3 [get_ports {DBG_LEDS_OUT[13]}]
+set_property PACKAGE_PIN P3 [get_ports {DBG_LEDS_OUT[12]}]
+set_property PACKAGE_PIN U3 [get_ports {DBG_LEDS_OUT[11]}]
+set_property PACKAGE_PIN W3 [get_ports {DBG_LEDS_OUT[10]}]
+set_property PACKAGE_PIN V3 [get_ports {DBG_LEDS_OUT[9]}]
+set_property PACKAGE_PIN V13 [get_ports {DBG_LEDS_OUT[8]}]
+set_property PACKAGE_PIN V14 [get_ports {DBG_LEDS_OUT[7]}]
+set_property PACKAGE_PIN U14 [get_ports {DBG_LEDS_OUT[6]}]
+set_property PACKAGE_PIN U15 [get_ports {DBG_LEDS_OUT[5]}]
+set_property PACKAGE_PIN W18 [get_ports {DBG_LEDS_OUT[4]}]
+set_property PACKAGE_PIN V19 [get_ports {DBG_LEDS_OUT[3]}]
+set_property PACKAGE_PIN U19 [get_ports {DBG_LEDS_OUT[2]}]
+set_property PACKAGE_PIN E19 [get_ports {DBG_LEDS_OUT[1]}]
+set_property PACKAGE_PIN U16 [get_ports {DBG_LEDS_OUT[0]}]
+
+
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_SWTC_IN[15]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_SWTC_IN[14]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_SWTC_IN[13]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_SWTC_IN[12]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_SWTC_IN[11]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_SWTC_IN[10]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_SWTC_IN[9]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_SWTC_IN[8]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_SWTC_IN[7]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_SWTC_IN[5]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_SWTC_IN[4]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_SWTC_IN[3]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_SWTC_IN[2]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_SWTC_IN[1]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_SWTC_IN[6]}]
+set_property IOSTANDARD LVCMOS33 [get_ports {DBG_SWTC_IN[0]}]
+set_property PACKAGE_PIN R2 [get_ports {DBG_SWTC_IN[15]}]
+set_property PACKAGE_PIN T1 [get_ports {DBG_SWTC_IN[14]}]
+set_property PACKAGE_PIN U1 [get_ports {DBG_SWTC_IN[13]}]
+set_property PACKAGE_PIN W2 [get_ports {DBG_SWTC_IN[12]}]
+set_property PACKAGE_PIN R3 [get_ports {DBG_SWTC_IN[11]}]
+set_property PACKAGE_PIN T2 [get_ports {DBG_SWTC_IN[10]}]
+set_property PACKAGE_PIN T3 [get_ports {DBG_SWTC_IN[9]}]
+set_property PACKAGE_PIN V2 [get_ports {DBG_SWTC_IN[8]}]
+set_property PACKAGE_PIN W13 [get_ports {DBG_SWTC_IN[7]}]
+set_property PACKAGE_PIN W14 [get_ports {DBG_SWTC_IN[6]}]
+set_property PACKAGE_PIN V15 [get_ports {DBG_SWTC_IN[5]}]
+set_property PACKAGE_PIN W15 [get_ports {DBG_SWTC_IN[4]}]
+set_property PACKAGE_PIN W17 [get_ports {DBG_SWTC_IN[3]}]
+set_property PACKAGE_PIN W16 [get_ports {DBG_SWTC_IN[2]}]
+set_property PACKAGE_PIN V16 [get_ports {DBG_SWTC_IN[1]}]
+set_property PACKAGE_PIN V17 [get_ports {DBG_SWTC_IN[0]}]
diff --git a/test/conntest/conntest.srcs/top.vhd b/test/conntest/conntest.srcs/top.vhd
new file mode 100644
index 0000000..68c4864
--- /dev/null
+++ b/test/conntest/conntest.srcs/top.vhd
@@ -0,0 +1,32 @@
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.numeric_std.all;
+
+entity top is port (
+ SYSCLK : in std_logic; -- clock basys3 100MHz
+ RESET : in std_logic; -- global (async) system reset
+ SPI_CLK, SPI_MOSI, SPI_SR : in std_logic;
+ DBG_SWTC_IN : in std_logic_vector(15 downto 0); -- switches
+ DBG_LEDS_OUT : out std_logic_vector(15 downto 0); -- leds
+ VBLANK, HBLANK : out std_logic); -- vblank for synchronization
+end top;
+
+architecture Behavioral of top is
+begin
+ process(SYSCLK, RESET)
+ begin
+ if RESET = '1' then
+ VBLANK <= '0';
+ HBLANK <= '0';
+ DBG_LEDS_OUT(15) <= '0';
+ DBG_LEDS_OUT(14) <= '0';
+ DBG_LEDS_OUT(13) <= '0';
+ elsif rising_edge(SYSCLK) then
+ VBLANK <= DBG_SWTC_IN(0);
+ HBLANK <= DBG_SWTC_IN(1);
+ DBG_LEDS_OUT(15) <= SPI_SR;
+ DBG_LEDS_OUT(14) <= SPI_CLK;
+ DBG_LEDS_OUT(13) <= SPI_MOSI;
+ end if;
+ end process;
+end Behavioral;