diff options
| author | lonkaars <loek@pipeframe.xyz> | 2023-03-13 20:05:35 +0100 |
|---|---|---|
| committer | lonkaars <loek@pipeframe.xyz> | 2023-03-13 20:05:35 +0100 |
| commit | 994e96753aeb65080001530b1e62e070c975f4f1 (patch) | |
| tree | 7245745c83f804a6d6517eb20073191fbac4a852 /basys3/basys3.srcs/sources_1/ip | |
| parent | bec47edeefed4d9a545ad0bfa43d7edee6379b03 (diff) | |
working bitstream generationppu
Diffstat (limited to 'basys3/basys3.srcs/sources_1/ip')
4 files changed, 4 insertions, 4 deletions
diff --git a/basys3/basys3.srcs/sources_1/ip/ppu_bam/ppu_bam.xci b/basys3/basys3.srcs/sources_1/ip/ppu_bam/ppu_bam.xci index 9f293d6..c188e32 100644 --- a/basys3/basys3.srcs/sources_1/ip/ppu_bam/ppu_bam.xci +++ b/basys3/basys3.srcs/sources_1/ip/ppu_bam/ppu_bam.xci @@ -163,7 +163,7 @@ "BOARD_CONNECTIONS": [ { "value": "" } ], "DEVICE": [ { "value": "xc7a35t" } ], "PACKAGE": [ { "value": "cpg236" } ], - "PREFHDL": [ { "value": "VHDL" } ], + "PREFHDL": [ { "value": "VERILOG" } ], "SILICON_REVISION": [ { "value": "" } ], "SIMULATOR_LANGUAGE": [ { "value": "MIXED" } ], "SPEEDGRADE": [ { "value": "-1" } ], diff --git a/basys3/basys3.srcs/sources_1/ip/ppu_dispctl_pixclk/ppu_dispctl_pixclk.xci b/basys3/basys3.srcs/sources_1/ip/ppu_dispctl_pixclk/ppu_dispctl_pixclk.xci index 71185e4..620084f 100644 --- a/basys3/basys3.srcs/sources_1/ip/ppu_dispctl_pixclk/ppu_dispctl_pixclk.xci +++ b/basys3/basys3.srcs/sources_1/ip/ppu_dispctl_pixclk/ppu_dispctl_pixclk.xci @@ -588,7 +588,7 @@ "BOARD_CONNECTIONS": [ { "value": "" } ], "DEVICE": [ { "value": "xc7a35t" } ], "PACKAGE": [ { "value": "cpg236" } ], - "PREFHDL": [ { "value": "VHDL" } ], + "PREFHDL": [ { "value": "VERILOG" } ], "SILICON_REVISION": [ { "value": "" } ], "SIMULATOR_LANGUAGE": [ { "value": "MIXED" } ], "SPEEDGRADE": [ { "value": "-1" } ], diff --git a/basys3/basys3.srcs/sources_1/ip/ppu_dispctl_slbuf/ppu_dispctl_slbuf.xci b/basys3/basys3.srcs/sources_1/ip/ppu_dispctl_slbuf/ppu_dispctl_slbuf.xci index 4677e6b..22b53c3 100644 --- a/basys3/basys3.srcs/sources_1/ip/ppu_dispctl_slbuf/ppu_dispctl_slbuf.xci +++ b/basys3/basys3.srcs/sources_1/ip/ppu_dispctl_slbuf/ppu_dispctl_slbuf.xci @@ -163,7 +163,7 @@ "BOARD_CONNECTIONS": [ { "value": "" } ], "DEVICE": [ { "value": "xc7a35t" } ], "PACKAGE": [ { "value": "cpg236" } ], - "PREFHDL": [ { "value": "VHDL" } ], + "PREFHDL": [ { "value": "VERILOG" } ], "SILICON_REVISION": [ { "value": "" } ], "SIMULATOR_LANGUAGE": [ { "value": "MIXED" } ], "SPEEDGRADE": [ { "value": "-1" } ], diff --git a/basys3/basys3.srcs/sources_1/ip/ppu_tmm/ppu_tmm.xci b/basys3/basys3.srcs/sources_1/ip/ppu_tmm/ppu_tmm.xci index 958b9b9..e08ff96 100644 --- a/basys3/basys3.srcs/sources_1/ip/ppu_tmm/ppu_tmm.xci +++ b/basys3/basys3.srcs/sources_1/ip/ppu_tmm/ppu_tmm.xci @@ -163,7 +163,7 @@ "BOARD_CONNECTIONS": [ { "value": "" } ], "DEVICE": [ { "value": "xc7a35t" } ], "PACKAGE": [ { "value": "cpg236" } ], - "PREFHDL": [ { "value": "VHDL" } ], + "PREFHDL": [ { "value": "VERILOG" } ], "SILICON_REVISION": [ { "value": "" } ], "SIMULATOR_LANGUAGE": [ { "value": "MIXED" } ], "SPEEDGRADE": [ { "value": "-1" } ], |