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authorlonkaars <loek@pipeframe.xyz>2023-02-24 13:20:02 +0100
committerlonkaars <loek@pipeframe.xyz>2023-02-24 13:20:02 +0100
commitf3a47bde9bfaaa716de835c0c1499a685b4ac4f7 (patch)
tree90abe28726ea7484184179129256022472eb2e24 /basys3/basys3.srcs/apu_note_to_frequency_tb.vhd
parent7da7908989686daa2ac9fd2f3f79cad2f03c0828 (diff)
parent14a1c464c27206bff847fd46d3d5594b30f53af9 (diff)
Merge branch 'dev' into ppu-interface
Diffstat (limited to 'basys3/basys3.srcs/apu_note_to_frequency_tb.vhd')
-rw-r--r--basys3/basys3.srcs/apu_note_to_frequency_tb.vhd14
1 files changed, 7 insertions, 7 deletions
diff --git a/basys3/basys3.srcs/apu_note_to_frequency_tb.vhd b/basys3/basys3.srcs/apu_note_to_frequency_tb.vhd
index 6814c1f..f48a40c 100644
--- a/basys3/basys3.srcs/apu_note_to_frequency_tb.vhd
+++ b/basys3/basys3.srcs/apu_note_to_frequency_tb.vhd
@@ -10,20 +10,20 @@ end entity;
architecture Behavioral of apu_note_to_frequency_tb is
component apu_note_to_frequency is port(
- data: in std_logic_vector(7 downto 0);
- freq: out std_logic_vector(11 downto 0)); -- frequency
+ data : in std_logic_vector(7 downto 0);
+ freq : out std_logic_vector(11 downto 0)); -- frequency
end component;
- signal data: std_logic_vector(7 downto 0) := (others => '0');
- signal freq: std_logic_vector(11 downto 0) := (others => '0');
+ signal data : std_logic_vector(7 downto 0) := (others => '0');
+ signal freq : std_logic_vector(11 downto 0) := (others => '0');
- signal ok: boolean := false;
+ signal ok : boolean := false;
begin
- uut: apu_note_to_frequency port map(
+ uut : apu_note_to_frequency port map(
data => data,
freq => freq);
- tb: process
+ tb : process
begin
for i in 0 to 255 loop
data <= std_logic_vector(to_unsigned(i, 8));