diff options
author | lonkaars <loek@pipeframe.xyz> | 2022-12-19 15:51:21 +0100 |
---|---|---|
committer | lonkaars <loek@pipeframe.xyz> | 2022-12-19 15:51:21 +0100 |
commit | 3f01179d64959276062284ab17239844c02d952c (patch) | |
tree | e14a9fbe54340ff9191f8c5ac920ae0fcd0403f2 /src | |
parent | 7608345e2b9ca7541baa0135b2915747bf613d7d (diff) |
refactor vga and move pixeldata to pixeldata-square
Diffstat (limited to 'src')
-rw-r--r-- | src/pixeldata-square.vhd (renamed from src/pixeldata.vhd) | 0 | ||||
-rw-r--r-- | src/vga.vhd | 140 |
2 files changed, 80 insertions, 60 deletions
diff --git a/src/pixeldata.vhd b/src/pixeldata-square.vhd index 0fa229f..0fa229f 100644 --- a/src/pixeldata.vhd +++ b/src/pixeldata-square.vhd diff --git a/src/vga.vhd b/src/vga.vhd index 16becca..9ba5797 100644 --- a/src/vga.vhd +++ b/src/vga.vhd @@ -1,60 +1,80 @@ -library ieee;
-use ieee.std_logic_1164.all;
-use ieee.std_logic_arith.all;
-use ieee.std_logic_unsigned.all;
-
-entity vga is
- port (
- clk25, reset: in std_logic;
- x, y: out std_logic_vector(9 downto 0);
- rgb: in std_logic_vector(11 downto 0);
- red, green, blue: out std_logic_vector(3 downto 0);
- hsync, vsync: out std_logic);
-end vga;
-
-architecture Behavioral of vga is
- signal hcount: std_logic_vector(9 downto 0);
- signal vcount: std_logic_vector(9 downto 0);
-begin
-
- process (clk25)
- begin
- if rising_edge(clk25) then
- if (hcount >= 144) and (hcount < 784) and (vcount >= 31) and (vcount < 511) then
- x <= hcount - 144;
- y <= vcount - 31;
- red <= rgb(11 downto 8);
- green <= rgb(7 downto 4);
- blue <= rgb(3 downto 0);
- else
- red <= x"0";
- green <= x"0";
- blue <= x"0";
- end if;
-
- if hcount < 97 then
- hsync <= '0';
- else
- hsync <= '1';
- end if;
-
- if vcount < 3 then
- vsync <= '0';
- else
- vsync <= '1';
- end if;
-
- hcount <= hcount + 1;
-
- if hcount = 800 then
- vcount <= vcount + 1;
- hcount <= (others => '0');
- end if;
-
- if vcount = 521 then
- vcount <= (others => '0');
- end if;
- end if;
- end process;
-end Behavioral;
-
+library ieee; +use ieee.std_logic_1164.all; +use ieee.std_logic_arith.all; +use ieee.std_logic_unsigned.all; + +entity vga is + port ( + clk25, reset: in std_logic; + x, y: out std_logic_vector(9 downto 0); + rgb: in std_logic_vector(11 downto 0); + red, green, blue: out std_logic_vector(3 downto 0); + hsync, vsync: out std_logic); +end vga; + +architecture Behavioral of vga is + signal hcount: std_logic_vector(9 downto 0); + signal vcount: std_logic_vector(9 downto 0); + + -- timing info from http://www.tinyvga.com/vga-timing/640x480@60Hz + constant screen_sz_ver: natural := 480; -- screen size vertical + constant pulse_ver: natural := 2; -- vertical sync pulse width + constant front_porch_ver: natural := 10; -- vertical front porch pulse width + constant back_porch_ver: natural := 33; -- vertical back porch pulse width + constant screen_sz_hor: natural := 640; -- screen size horizontal + constant pulse_hor: natural := 96; -- horizontal sync pulse width + constant front_porch_hor: natural := 16; -- horizontal front porch pulse width + constant back_porch_hor: natural := 48; -- horizontal back porch pulse width +begin + + process (clk25) + begin + if rising_edge(clk25) then + -- display area + if (hcount >= (pulse_hor + back_porch_hor)) and + (hcount < (pulse_hor + back_porch_hor + screen_sz_hor)) and + (vcount >= (pulse_ver + back_porch_ver)) and + (vcount < (pulse_ver + back_porch_ver + screen_sz_ver)) then + x <= hcount - (pulse_hor + back_porch_hor); + y <= vcount - (pulse_ver + back_porch_ver); + red <= rgb(11 downto 8); + green <= rgb(7 downto 4); + blue <= rgb(3 downto 0); + else + -- turn off RGB during sync pulses + red <= x"0"; + green <= x"0"; + blue <= x"0"; + end if; + + -- vertical pulse + if hcount <= pulse_hor then + hsync <= '0'; + else + hsync <= '1'; + end if; + + -- horizontal pulse + if vcount <= pulse_ver then + vsync <= '0'; + else + vsync <= '1'; + end if; + + -- update horizontal line counter + hcount <= hcount + 1; + + -- horizontal line counter overflow + if hcount = (front_porch_hor + back_porch_hor + pulse_hor + screen_sz_hor) then + vcount <= vcount + 1; + hcount <= (others => '0'); + end if; + + -- vertical line counter overflow + if vcount = (front_porch_ver + back_porch_ver + pulse_ver + screen_sz_ver) then + vcount <= (others => '0'); + end if; + end if; + end process; +end Behavioral; + |