diff options
| author | lonkaars <loek@pipeframe.xyz> | 2022-11-27 14:46:14 +0100 |
|---|---|---|
| committer | lonkaars <loek@pipeframe.xyz> | 2022-11-27 14:46:14 +0100 |
| commit | d2cbbf49cf8e866af996672ff1b34bb428091261 (patch) | |
| tree | 377797fd414461ef797be20fc97ee8596235e5a6 /alu | |
| parent | c8e5df8075b7539082b8afb0f161bae2fc99c8d7 (diff) | |
ALU implemented but broken
Diffstat (limited to 'alu')
| l--------- | alu/alu.srcs/sources_1/binary_to_bcd_digit.vhd | 1 | ||||
| -rw-r--r-- | alu/alu.xpr | 12 |
2 files changed, 9 insertions, 4 deletions
diff --git a/alu/alu.srcs/sources_1/binary_to_bcd_digit.vhd b/alu/alu.srcs/sources_1/binary_to_bcd_digit.vhd new file mode 120000 index 0000000..516162a --- /dev/null +++ b/alu/alu.srcs/sources_1/binary_to_bcd_digit.vhd @@ -0,0 +1 @@ +../../../copyright/bijlagen/binary_to_bcd_digit.vhd
\ No newline at end of file diff --git a/alu/alu.xpr b/alu/alu.xpr index ca73037..5953561 100644 --- a/alu/alu.xpr +++ b/alu/alu.xpr @@ -59,7 +59,7 @@ <Option Name="IPStaticSourceDir" Val="$PIPUSERFILESDIR/ipstatic"/> <Option Name="EnableBDX" Val="FALSE"/> <Option Name="DSABoardId" Val="basys3"/> - <Option Name="WTXSimLaunchSim" Val="0"/> + <Option Name="WTXSimLaunchSim" Val="4"/> <Option Name="WTModelSimLaunchSim" Val="0"/> <Option Name="WTQuestaLaunchSim" Val="0"/> <Option Name="WTIesLaunchSim" Val="0"/> @@ -90,6 +90,12 @@ <FileSets Version="1" Minor="31"> <FileSet Name="sources_1" Type="DesignSrcs" RelSrcDir="$PSRCDIR/sources_1" RelGenDir="$PGENDIR/sources_1"> <Filter Type="Srcs"/> + <File Path="$PSRCDIR/sources_1/binary_to_bcd_digit.vhd"> + <FileInfo> + <Attr Name="UsedIn" Val="synthesis"/> + <Attr Name="UsedIn" Val="simulation"/> + </FileInfo> + </File> <File Path="$PSRCDIR/sources_1/binary_to_bcd.vhd"> <FileInfo> <Attr Name="UsedIn" Val="synthesis"/> @@ -196,16 +202,14 @@ <Filter Type="Srcs"/> <File Path="$PSRCDIR/sim_1/alu_tb.vhd"> <FileInfo> - <Attr Name="AutoDisabled" Val="1"/> <Attr Name="UsedIn" Val="synthesis"/> <Attr Name="UsedIn" Val="simulation"/> </FileInfo> </File> <Config> <Option Name="DesignMode" Val="RTL"/> - <Option Name="TopModule" Val="binary_to_bcd"/> + <Option Name="TopModule" Val="ALU_TB"/> <Option Name="TopLib" Val="xil_defaultlib"/> - <Option Name="TopAutoSet" Val="TRUE"/> <Option Name="TransportPathDelay" Val="0"/> <Option Name="TransportIntDelay" Val="0"/> <Option Name="SelectedSimModel" Val="rtl"/> |