Commit message (Expand) | Author | Age | |
---|---|---|---|
* | first steps in bringing over the JIT refactor/fastmem | RSDuck | 2020-06-16 |
* | improve nop handling and proper behaviour for LDM^ | RSDuck | 2020-04-26 |
* | integrate changes from ARM64 backend and more | RSDuck | 2020-04-26 |
* | decrease jit block cache address granularity | RSDuck | 2020-04-26 |
* | new block cache and much more... | RSDuck | 2020-04-26 |
* | load register only if needed | RSDuck | 2020-04-26 |
* | optimise away unneeded flag sets | RSDuck | 2020-04-26 |
* | jit: fix thumb hi reg alu and mcr halt | RSDuck | 2020-04-26 |
* | jit: branch instructions | RSDuck | 2020-04-26 |
* | JIT: compilation of word load and store | RSDuck | 2020-04-26 |
* | JIT: base | RSDuck | 2020-04-26 |