Commit message (Expand) | Author | Age | |
---|---|---|---|
* | implement msr and mrs for the x64 JIT | RSDuck | 2020-06-16 |
* | move ARM64 JIT backend here | RSDuck | 2020-06-16 |
* | improve nop handling and proper behaviour for LDM^ | RSDuck | 2020-06-16 |
* | integrate changes from ARM64 backend and more | RSDuck | 2020-06-16 |
* | decrease jit block cache address granularity | RSDuck | 2020-06-16 |
* | new block cache and much more... | RSDuck | 2020-06-16 |
* | more fixes for flag optimisation | RSDuck | 2020-06-16 |
* | fixes for flag optimisation | RSDuck | 2020-06-16 |
* | optimise away unneeded flag sets | RSDuck | 2020-06-16 |
* | fix register alloc for half word loads | RSDuck | 2020-06-16 |
* | jit: fix thumb hi reg alu and mcr halt | RSDuck | 2020-06-16 |
* | jit: fix misc static branch things | RSDuck | 2020-06-16 |
* | jit: fix BLX_reg with rn=lr | RSDuck | 2020-06-16 |
* | jit: branch instructions | RSDuck | 2020-06-16 |
* | jit: thumb block transfer working | RSDuck | 2020-06-16 |
* | JIT: most mem instructions working | RSDuck | 2020-06-16 |
* | JIT: base | RSDuck | 2020-06-16 |