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path: root/src/ARMJIT_x64
Commit message (Expand)AuthorAge
* first steps in bringing over the JIT refactor/fastmemRSDuck2020-06-16
* fix inlined IO register accessRSDuck2020-06-16
* allow allocating caller saved regs on windowsRSDuck2020-05-09
* allow allocating caller saved registersRSDuck2020-05-09
* rewrite JIT memory emulationRSDuck2020-05-09
* fix regression from last commitRSDuck2020-04-26
* don't use param registers for ReadBanked/WriteBankedRSDuck2020-04-26
* hopefully fix stack handling for linuxRSDuck2020-04-26
* implement msr and mrs for the x64 JITRSDuck2020-04-26
* compile UMULLs and some fixesRSDuck2020-04-26
* implement block linking + some refactoringRSDuck2020-04-26
* include more information in DataRegionRSDuck2020-04-26
* improve nop handling and proper behaviour for LDM^RSDuck2020-04-26
* disable literal optimations in DTCMRSDuck2020-04-26
* make literal optimisation more reliableRSDuck2020-04-26
* integrate changes from ARM64 backend and moreRSDuck2020-04-26
* decrease jit block cache address granularityRSDuck2020-04-26
* remove leftover debug codeRSDuck2020-04-26
* new block cache and much more...RSDuck2020-04-26
* load register only if neededRSDuck2020-04-26
* more fixes for flag optimisationRSDuck2020-04-26
* remove debug printingRSDuck2020-04-26
* fixes for flag optimisationRSDuck2020-04-26
* optimise away unneeded flag setsRSDuck2020-04-26
* abandon pipelining on jitRSDuck2020-04-26
* remove unneeded dolphin code, C++11 static_assertRSDuck2020-04-26
* jit: fix RSCRSDuck2020-04-26
* jit: fix thumb hi reg alu and mcr haltRSDuck2020-04-26
* jit: decrease blockcache AddrMapping size for ARM9RSDuck2020-04-26
* jit: fix misc static branch thingsRSDuck2020-04-26
* jit: LDM/STM keep proper stack alignmentRSDuck2020-04-26
* jit: fix BLX_reg with rn=lrRSDuck2020-04-26
* jit: add compile optionRSDuck2020-04-26
* jit: make everything configurableRSDuck2020-04-26
* jit: fix linuxRSDuck2020-04-26
* jit: fix wrongly placed constRSDuck2020-04-26
* jit: SMULL and SMLALRSDuck2020-04-26
* jit: LDM/STM finally(!) working + MUL, MLA and CLZRSDuck2020-04-26
* jit: branch instructionsRSDuck2020-04-26
* jit: thumb block transfer workingRSDuck2020-04-26
* JIT: most mem instructions workingRSDuck2020-04-26
* JIT: compilation of word load and storeRSDuck2020-04-26
* jit: correct cycle counting for thumb shift by regRSDuck2020-04-26
* JIT: implemented most ALU instructionsRSDuck2020-04-26
* JIT: baseRSDuck2020-04-26