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* Random minor fixes (#757)Valeri2020-10-01
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Fix incorrect/questionable assert() usage Originally reported by https://lgtm.com/projects/g/Arisotura/melonDS/?mode=tree&ruleFocus=2159000700, but also includes a bunch of other fixes. * Fix some `printf` warnings Rule https://lgtm.com/projects/g/Arisotura/melonDS/?mode=tree&ruleFocus=2160310550 * Remove useless check It is never passed thanks to `if (num_in < 1) {...; return}` before Rule https://lgtm.com/projects/g/Arisotura/melonDS/?mode=tree&ruleFocus=2154840804 * Add missing header guard, rename other to avoid conflicts Rule https://lgtm.com/projects/g/Arisotura/melonDS/?mode=tree&ruleFocus=2163210746 * Make DSi_SDDevice destructor virtual Rule https://lgtm.com/projects/g/Arisotura/melonDS/?mode=tree&ruleFocus=2158670642 * Use thread-safe localtime_r, assign `time` result directly Rule https://lgtm.com/projects/g/Arisotura/melonDS/?mode=tree&ruleFocus=2154840805 * Fix MinGW build It needs _POSIX_THREAD_SAFE_FUNCTIONS to export `localtime_r`
* remove some UBRSDuck2020-09-04
| | | | | | | - savestates used to read a four bytes from a single byte value - a few unassigned variables - some other things - also make the ROR macro an inline function
* subtract cycles after checking IRQ and HaltRSDuck2020-07-27
| | | | also switch back to adding to ARM::Cycles instead of subtracting from them
* x64 JIT: remove unecessary MOVRSDuck2020-07-27
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* x64 JIT: generate patch trunk for RSCRATCH4RSDuck2020-07-25
| | | | I thought I already fixed this?
* implement carry setting ALU op with immRSDuck2020-07-25
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* fix for fastmem when pc is used as immediateRSDuck2020-07-08
| | | | and (hopefully) make SIGSEGV handler work for aarch64 linux
* misc JIT changesRSDuck2020-07-08
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* make linux work and fix a few bugsRSDuck2020-07-04
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* reconcile DSi and JIT, fastmem for x64 and WindowsRSDuck2020-06-30
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* make literal optimisation work againRSDuck2020-06-16
| | | | enable single register block load/store optimisations for x64 aswell
* first steps in bringing over the JIT refactor/fastmemRSDuck2020-06-16
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* fix inlined IO register accessRSDuck2020-06-16
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* allow allocating caller saved regs on windowsRSDuck2020-05-09
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* allow allocating caller saved registersRSDuck2020-05-09
| | | | currently system-v only
* rewrite JIT memory emulationRSDuck2020-05-09
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* fix regression from last commitRSDuck2020-04-26
| | | | also a small mistake with msr
* don't use param registers for ReadBanked/WriteBankedRSDuck2020-04-26
| | | | should fix linux build
* hopefully fix stack handling for linuxRSDuck2020-04-26
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* implement msr and mrs for the x64 JITRSDuck2020-04-26
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* compile UMULLs and some fixesRSDuck2020-04-26
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* implement block linking + some refactoringRSDuck2020-04-26
| | | | currently only supported for x64
* include more information in DataRegionRSDuck2020-04-26
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* improve nop handling and proper behaviour for LDM^RSDuck2020-04-26
| | | | fixes dslinux
* disable literal optimations in DTCMRSDuck2020-04-26
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* make literal optimisation more reliableRSDuck2020-04-26
| | | | fixes spanish Pokemon HeartGold
* integrate changes from ARM64 backend and moreRSDuck2020-04-26
| | | | | | | | | - better handle LDM/STM in reg alloc - unify Halted and IRQ in anticipation for branch inlining - literal optimisations can be disabled in gui - jit blocks follow simple returns - fix idle loop detection - break jit blocks on IRQ (fixes saving in Pokemon White)
* decrease jit block cache address granularityRSDuck2020-04-26
| | | | | | | fixes Dragon Quest IX move code with side effects out of assert, fixes release build (thanks to m4wx for this one) also remove some leftovers of jit pipelining
* remove leftover debug codeRSDuck2020-04-26
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* new block cache and much more...RSDuck2020-04-26
| | | | | | | | | - more reliable code invalidation detection - blocks aren't stopped at any branch, but are being followed if possible to get larger blocks - idle loop recognition - optimised literal loads, load/store cycle counting and loads/stores from constant addresses
* load register only if neededRSDuck2020-04-26
| | | | | - do thumb bl long merge in the first step - preparations for better branch jitting
* more fixes for flag optimisationRSDuck2020-04-26
| | | | + small cycle counting optimisation
* remove debug printingRSDuck2020-04-26
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* fixes for flag optimisationRSDuck2020-04-26
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* optimise away unneeded flag setsRSDuck2020-04-26
| | | | | - especially useful for thumb code and larger max block sizes - can still be improved upon
* abandon pipelining on jitRSDuck2020-04-26
| | | | | fixes Golden Sun Dawn this makes the cpu state incompatible between interpreter and JIT. That's why switching cpu mode requires a restart(not requiring is stupid anyway) and the pipeline is manually filled when making a save state.
* remove unneeded dolphin code, C++11 static_assertRSDuck2020-04-26
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* jit: fix RSCRSDuck2020-04-26
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* jit: fix thumb hi reg alu and mcr haltRSDuck2020-04-26
| | | | + mcr/mrc aren't always, msr_imm is never unk on ARM7
* jit: decrease blockcache AddrMapping size for ARM9RSDuck2020-04-26
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* jit: fix misc static branch thingsRSDuck2020-04-26
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* jit: LDM/STM keep proper stack alignmentRSDuck2020-04-26
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* jit: fix BLX_reg with rn=lrRSDuck2020-04-26
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* jit: add compile optionRSDuck2020-04-26
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* jit: make everything configurableRSDuck2020-04-26
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* jit: fix linuxRSDuck2020-04-26
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* jit: fix wrongly placed constRSDuck2020-04-26
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* jit: SMULL and SMLALRSDuck2020-04-26
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* jit: LDM/STM finally(!) working + MUL, MLA and CLZRSDuck2020-04-26
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* jit: branch instructionsRSDuck2020-04-26
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