diff options
| author | RSDuck <RSDuck@users.noreply.github.com> | 2020-07-08 23:47:24 +0200 |
|---|---|---|
| committer | RSDuck <RSDuck@users.noreply.github.com> | 2020-07-08 23:47:24 +0200 |
| commit | 8f5d8d1e125511e3420ffec991e6a6b0a7441d31 (patch) | |
| tree | b3c622ba85630f6016fc8f5c418bc5a48152ab60 /src/ARMJIT_x64 | |
| parent | 3786660099e6517a9230ec6f76559b72aa1660fd (diff) | |
fix for fastmem when pc is used as immediate
and (hopefully) make SIGSEGV handler work for aarch64 linux
Diffstat (limited to 'src/ARMJIT_x64')
| -rw-r--r-- | src/ARMJIT_x64/ARMJIT_Compiler.h | 2 | ||||
| -rw-r--r-- | src/ARMJIT_x64/ARMJIT_LoadStore.cpp | 6 |
2 files changed, 7 insertions, 1 deletions
diff --git a/src/ARMJIT_x64/ARMJIT_Compiler.h b/src/ARMJIT_x64/ARMJIT_Compiler.h index 0fe0147..9a64d09 100644 --- a/src/ARMJIT_x64/ARMJIT_Compiler.h +++ b/src/ARMJIT_x64/ARMJIT_Compiler.h @@ -179,7 +179,7 @@ public: Gen::OpArg MapReg(int reg) { - if (reg == 15 && RegCache.Mapping[reg] == Gen::INVALID_REG) + if (reg == 15 && !(RegCache.LoadedRegs & (1 << 15))) return Gen::Imm32(R15); assert(RegCache.Mapping[reg] != Gen::INVALID_REG); diff --git a/src/ARMJIT_x64/ARMJIT_LoadStore.cpp b/src/ARMJIT_x64/ARMJIT_LoadStore.cpp index aa84105..57d98cc 100644 --- a/src/ARMJIT_x64/ARMJIT_LoadStore.cpp +++ b/src/ARMJIT_x64/ARMJIT_LoadStore.cpp @@ -183,6 +183,12 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag if (Config::JIT_FastMemory && ((!Thumb && CurInstr.Cond() != 0xE) || ARMJIT_Memory::IsFastmemCompatible(expectedTarget))) { + if (rdMapped.IsImm()) + { + MOV(32, R(RSCRATCH4), rdMapped); + rdMapped = R(RSCRATCH4); + } + u8* memopStart = GetWritableCodePtr(); LoadStorePatch patch; |