Commit message (Collapse) | Author | Age | |
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* | fix for fastmem when pc is used as immediate | RSDuck | 2020-07-08 |
| | | | | and (hopefully) make SIGSEGV handler work for aarch64 linux | ||
* | reconcile DSi and JIT, fastmem for x64 and Windows | RSDuck | 2020-06-30 |
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* | make literal optimisation work again | RSDuck | 2020-06-16 |
| | | | | enable single register block load/store optimisations for x64 aswell | ||
* | first steps in bringing over the JIT refactor/fastmem | RSDuck | 2020-06-16 |
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* | allow allocating caller saved registers | RSDuck | 2020-05-09 |
| | | | | currently system-v only | ||
* | rewrite JIT memory emulation | RSDuck | 2020-05-09 |
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* | don't use param registers for ReadBanked/WriteBanked | RSDuck | 2020-04-26 |
| | | | | should fix linux build | ||
* | implement msr and mrs for the x64 JIT | RSDuck | 2020-04-26 |
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* | compile UMULLs and some fixes | RSDuck | 2020-04-26 |
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* | implement block linking + some refactoring | RSDuck | 2020-04-26 |
| | | | | currently only supported for x64 | ||
* | improve nop handling and proper behaviour for LDM^ | RSDuck | 2020-04-26 |
| | | | | fixes dslinux | ||
* | new block cache and much more... | RSDuck | 2020-04-26 |
| | | | | | | | | | - more reliable code invalidation detection - blocks aren't stopped at any branch, but are being followed if possible to get larger blocks - idle loop recognition - optimised literal loads, load/store cycle counting and loads/stores from constant addresses | ||
* | load register only if needed | RSDuck | 2020-04-26 |
| | | | | | - do thumb bl long merge in the first step - preparations for better branch jitting | ||
* | more fixes for flag optimisation | RSDuck | 2020-04-26 |
| | | | | + small cycle counting optimisation | ||
* | optimise away unneeded flag sets | RSDuck | 2020-04-26 |
| | | | | | - especially useful for thumb code and larger max block sizes - can still be improved upon | ||
* | remove unneeded dolphin code, C++11 static_assert | RSDuck | 2020-04-26 |
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* | jit: add compile option | RSDuck | 2020-04-26 |
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* | jit: make everything configurable | RSDuck | 2020-04-26 |
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* | jit: fix linux | RSDuck | 2020-04-26 |
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* | jit: SMULL and SMLAL | RSDuck | 2020-04-26 |
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* | jit: LDM/STM finally(!) working + MUL, MLA and CLZ | RSDuck | 2020-04-26 |
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* | jit: branch instructions | RSDuck | 2020-04-26 |
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* | jit: thumb block transfer working | RSDuck | 2020-04-26 |
| | | | | also pc and sp relative loads and some refactoring | ||
* | JIT: most mem instructions working | RSDuck | 2020-04-26 |
| | | | | + branching | ||
* | JIT: compilation of word load and store | RSDuck | 2020-04-26 |
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* | JIT: implemented most ALU instructions | RSDuck | 2020-04-26 |
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* | JIT: base | RSDuck | 2020-04-26 |
all instructions are interpreted |