| Commit message (Expand) | Author | Age | |
|---|---|---|---|
| * | Update copyright year and add missing GPL headers part 2 | WaluigiWare64 | 2021-03-21 |
| * | JIT fixes | RSDuck | 2020-11-09 |
| * | reset fastmem on DSi soft reset | RSDuck | 2020-07-31 |
| * | for some reason tabs and spaces were mixed | RSDuck | 2020-07-23 |
| * | reconcile DSi and JIT, fastmem for x64 and Windows | RSDuck | 2020-06-30 |
| * | first steps in bringing over the JIT refactor/fastmem | RSDuck | 2020-06-16 |
| * | rewrite JIT memory emulation | RSDuck | 2020-05-09 |
| * | implement block linking + some refactoring | RSDuck | 2020-04-26 |
| * | include more information in DataRegion | RSDuck | 2020-04-26 |
| * | preparations for block linking | RSDuck | 2020-04-26 |
| * | make literal optimisation more reliable | RSDuck | 2020-04-26 |
| * | decrease jit block cache address granularity | RSDuck | 2020-04-26 |
| * | new block cache and much more... | RSDuck | 2020-04-26 |