Commit message (Expand) | Author | Age | |
---|---|---|---|
* | reconcile DSi and JIT, fastmem for x64 and Windows | RSDuck | 2020-06-30 |
* | first steps in bringing over the JIT refactor/fastmem | RSDuck | 2020-06-16 |
* | rewrite JIT memory emulation | RSDuck | 2020-05-09 |
* | implement block linking + some refactoring | RSDuck | 2020-04-26 |
* | make literal optimisation more reliable | RSDuck | 2020-04-26 |
* | new block cache and much more... | RSDuck | 2020-04-26 |
* | load register only if needed | RSDuck | 2020-04-26 |
* | optimise away unneeded flag sets | RSDuck | 2020-04-26 |
* | jit: decrease blockcache AddrMapping size for ARM9 | RSDuck | 2020-04-26 |
* | jit: make everything configurable | RSDuck | 2020-04-26 |
* | jit: branch instructions | RSDuck | 2020-04-26 |
* | JIT: most mem instructions working | RSDuck | 2020-04-26 |
* | JIT: compilation of word load and store | RSDuck | 2020-04-26 |
* | JIT: implemented most ALU instructions | RSDuck | 2020-04-26 |
* | JIT: base | RSDuck | 2020-04-26 |