| Commit message (Collapse) | Author | Age | ||
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| * | more instructions. shared WRAM. | StapleButter | 2016-12-03 | |
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| * | moar instructions and shit implemented | StapleButter | 2016-12-03 | |
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| * | less amnesia! ITCM, DTCM, corresponding CP15 support | StapleButter | 2016-12-03 | |
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| * | more crap implemented! | StapleButter | 2016-12-03 | |
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| * | amnesia is over | StapleButter | 2016-12-03 | |
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| * | more instructions. some handling of CPU mode switching. | StapleButter | 2016-12-03 | |
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| * | moar shit | StapleButter | 2016-12-03 | |
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| * | ARM ALU is done with. as well as other shit. | StapleButter | 2016-12-03 | |
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| * | add MSR/MRS. also fix misc error with LDR ROR effect. | StapleButter | 2016-12-03 | |
| | | | | | see shibboleet, I can do it too :> | |||
| * | implement LDR/STR/LDRB/STRB. | StapleButter | 2016-12-03 | |
| | | | | | more macro soup. | |||
| * | more shit! some start of ALU emulation | StapleButter | 2016-11-25 | |
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| * | well, adding shit. laying out the base for the interpreter. really dirty code. | StapleButter | 2016-11-24 | |
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| * | hey look, more crap | StapleButter | 2016-11-03 | |
| | | | | | no MrRean this doesn't run NSMB yet | |||
| * | add more crap | StapleButter | 2016-05-16 | |
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| * | first real commit, some shit is in | StapleButter | 2016-05-16 | |
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| * | Initial commit | StapleButter | 2016-05-16 | |