diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/DSi.cpp | 8 | ||||
| -rw-r--r-- | src/DSi_DSP.cpp | 21 | ||||
| -rw-r--r-- | src/teakra/src/teakra.cpp | 2 |
3 files changed, 22 insertions, 9 deletions
diff --git a/src/DSi.cpp b/src/DSi.cpp index 12cd954..301bd57 100644 --- a/src/DSi.cpp +++ b/src/DSi.cpp @@ -2365,7 +2365,7 @@ void ARM9IOWrite8(u32 addr, u8 val) return; case 0x04004006: - if (!(SCFG_EXT[1] & (1 << 31))) /* no access to SCFG Registers if disabled*/ + if (!(SCFG_EXT[0] & (1 << 31))) /* no access to SCFG Registers if disabled*/ return; SCFG_RST = (SCFG_RST & 0xFF00) | val; DSi_DSP::SetRstLine(val & 1); @@ -2375,7 +2375,7 @@ void ARM9IOWrite8(u32 addr, u8 val) case 0x04004041: case 0x04004042: case 0x04004043: - if (!(SCFG_EXT[1] & (1 << 31))) /* no access to SCFG Registers if disabled*/ + if (!(SCFG_EXT[0] & (1 << 31))) /* no access to SCFG Registers if disabled*/ return; MapNWRAM_A(addr & 3, val); return; @@ -2387,7 +2387,7 @@ void ARM9IOWrite8(u32 addr, u8 val) case 0x04004049: case 0x0400404A: case 0x0400404B: - if (!(SCFG_EXT[1] & (1 << 31))) /* no access to SCFG Registers if disabled*/ + if (!(SCFG_EXT[0] & (1 << 31))) /* no access to SCFG Registers if disabled*/ return; MapNWRAM_B((addr - 0x04) & 7, val); return; @@ -2399,7 +2399,7 @@ void ARM9IOWrite8(u32 addr, u8 val) case 0x04004051: case 0x04004052: case 0x04004053: - if (!(SCFG_EXT[1] & (1 << 31))) /* no access to SCFG Registers if disabled*/ + if (!(SCFG_EXT[0] & (1 << 31))) /* no access to SCFG Registers if disabled*/ return; MapNWRAM_C((addr-0x0C) & 7, val); return; diff --git a/src/DSi_DSP.cpp b/src/DSi_DSP.cpp index 711166c..74170b7 100644 --- a/src/DSi_DSP.cpp +++ b/src/DSi_DSP.cpp @@ -214,6 +214,11 @@ inline bool IsDSPCoreEnabled() return (DSi::SCFG_Clock9 & (1<<1)) && SCFG_RST && (!(DSP_PCFG & (1<<0))); } +inline bool IsDSPIOEnabled() +{ + return (DSi::SCFG_Clock9 & (1<<1)) && SCFG_RST; +} + bool DSPCatchUp() { //asm volatile("int3"); @@ -390,7 +395,8 @@ u16 PDataDMAReadMMIO() u8 Read8(u32 addr) { - if (!DSPCatchUp()) return 0; + if (!IsDSPIOEnabled()) return 0; + DSPCatchUp(); addr &= 0x3F; // mirroring wheee @@ -416,7 +422,9 @@ u8 Read8(u32 addr) } u16 Read16(u32 addr) { - if (!DSPCatchUp()) return 0; + //printf("DSP READ16 %d %08X %08X\n", IsDSPCoreEnabled(), addr, NDS::GetPC(0)); + if (!IsDSPIOEnabled()) return 0; + DSPCatchUp(); addr &= 0x3E; // mirroring wheee @@ -464,7 +472,8 @@ u32 Read32(u32 addr) void Write8(u32 addr, u8 val) { - if (!DSPCatchUp()) return; + if (!IsDSPIOEnabled()) return; + DSPCatchUp(); addr &= 0x3F; switch (addr) @@ -484,7 +493,9 @@ void Write8(u32 addr, u8 val) } void Write16(u32 addr, u16 val) { - if (!DSPCatchUp()) return; + //printf("DSP WRITE16 %d %08X %08X %08X\n", IsDSPCoreEnabled(), addr, val, NDS::GetPC(0)); + if (!IsDSPIOEnabled()) return; + DSPCatchUp(); addr &= 0x3E; switch (addr) @@ -494,6 +505,8 @@ void Write16(u32 addr, u16 val) case 0x08: DSP_PCFG = val; + if (DSP_PCFG & (1<<0)) + TeakraCore->Reset(); if (DSP_PCFG & (1<<4)) PDataDMAStart(); else diff --git a/src/teakra/src/teakra.cpp b/src/teakra/src/teakra.cpp index 7b4c028..9559920 100644 --- a/src/teakra/src/teakra.cpp +++ b/src/teakra/src/teakra.cpp @@ -50,7 +50,7 @@ struct Teakra::Impl { } void Reset() { - shared_memory.raw.fill(0); // BAD!!!! + //shared_memory.raw.fill(0); // BAD!!!! miu.Reset(); apbp_from_cpu.Reset(); apbp_from_dsp.Reset(); |