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-rw-r--r--src/ARMInterpreter.cpp22
-rw-r--r--src/ARMInterpreter_ALU.cpp12
-rw-r--r--src/ARMInterpreter_LoadStore.cpp6
3 files changed, 30 insertions, 10 deletions
diff --git a/src/ARMInterpreter.cpp b/src/ARMInterpreter.cpp
index 32b3a00..aa69816 100644
--- a/src/ARMInterpreter.cpp
+++ b/src/ARMInterpreter.cpp
@@ -32,14 +32,30 @@ namespace ARMInterpreter
void A_UNK(ARM* cpu)
{
printf("undefined ARM%d instruction %08X @ %08X\n", cpu->Num?7:9, cpu->CurInstr, cpu->R[15]-8);
- for (int i = 0; i < 16; i++) printf("R%d: %08X\n", i, cpu->R[i]);
- NDS::Halt();
+ //for (int i = 0; i < 16; i++) printf("R%d: %08X\n", i, cpu->R[i]);
+ //NDS::Halt();
+ u32 oldcpsr = cpu->CPSR;
+ cpu->CPSR &= ~0xFF;
+ cpu->CPSR |= 0xDB;
+ cpu->UpdateMode(oldcpsr, cpu->CPSR);
+
+ cpu->R_UND[2] = oldcpsr;
+ cpu->R[14] = cpu->R[15] - 4;
+ cpu->JumpTo(cpu->ExceptionBase + 0x04);
}
void T_UNK(ARM* cpu)
{
printf("undefined THUMB%d instruction %04X @ %08X\n", cpu->Num?7:9, cpu->CurInstr, cpu->R[15]-4);
- NDS::Halt();
+ //NDS::Halt();
+ u32 oldcpsr = cpu->CPSR;
+ cpu->CPSR &= ~0xFF;
+ cpu->CPSR |= 0xDB;
+ cpu->UpdateMode(oldcpsr, cpu->CPSR);
+
+ cpu->R_UND[2] = oldcpsr;
+ cpu->R[14] = cpu->R[15] - 2;
+ cpu->JumpTo(cpu->ExceptionBase + 0x04);
}
diff --git a/src/ARMInterpreter_ALU.cpp b/src/ARMInterpreter_ALU.cpp
index 340adf4..e8bab68 100644
--- a/src/ARMInterpreter_ALU.cpp
+++ b/src/ARMInterpreter_ALU.cpp
@@ -865,7 +865,7 @@ void A_SMLAL(ARM* cpu)
void A_SMLAxy(ARM* cpu)
{
- // TODO: ARM9 only
+ if (cpu->Num != 0) return A_UNK(cpu);
u32 rm = cpu->R[cpu->CurInstr & 0xF];
u32 rs = cpu->R[(cpu->CurInstr >> 8) & 0xF];
@@ -886,7 +886,7 @@ void A_SMLAxy(ARM* cpu)
void A_SMLAWy(ARM* cpu)
{
- // TODO: ARM9 only
+ if (cpu->Num != 0) return A_UNK(cpu);
u32 rm = cpu->R[cpu->CurInstr & 0xF];
u32 rs = cpu->R[(cpu->CurInstr >> 8) & 0xF];
@@ -905,7 +905,7 @@ void A_SMLAWy(ARM* cpu)
void A_SMULxy(ARM* cpu)
{
- // TODO: ARM9 only
+ if (cpu->Num != 0) return A_UNK(cpu);
u32 rm = cpu->R[cpu->CurInstr & 0xF];
u32 rs = cpu->R[(cpu->CurInstr >> 8) & 0xF];
@@ -922,7 +922,7 @@ void A_SMULxy(ARM* cpu)
void A_SMULWy(ARM* cpu)
{
- // TODO: ARM9 only
+ if (cpu->Num != 0) return A_UNK(cpu);
u32 rm = cpu->R[cpu->CurInstr & 0xF];
u32 rs = cpu->R[(cpu->CurInstr >> 8) & 0xF];
@@ -937,7 +937,7 @@ void A_SMULWy(ARM* cpu)
void A_SMLALxy(ARM* cpu)
{
- // TODO: ARM9 only
+ if (cpu->Num != 0) return A_UNK(cpu);
u32 rm = cpu->R[cpu->CurInstr & 0xF];
u32 rs = cpu->R[(cpu->CurInstr >> 8) & 0xF];
@@ -962,7 +962,7 @@ void A_SMLALxy(ARM* cpu)
void A_CLZ(ARM* cpu)
{
- // TODO: ARM9 only
+ if (cpu->Num != 0) return A_UNK(cpu);
u32 val = cpu->R[cpu->CurInstr & 0xF];
diff --git a/src/ARMInterpreter_LoadStore.cpp b/src/ARMInterpreter_LoadStore.cpp
index 16605ed..23e6b62 100644
--- a/src/ARMInterpreter_LoadStore.cpp
+++ b/src/ARMInterpreter_LoadStore.cpp
@@ -217,9 +217,10 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
cpu->DataWrite16(addr, cpu->R[(cpu->CurInstr>>12) & 0xF]); \
cpu->R[(cpu->CurInstr>>16) & 0xF] += offset; \
-// TODO: CHECK LDRD/STRD TIMINGS!! also, ARM9-only
+// TODO: CHECK LDRD/STRD TIMINGS!!
#define A_LDRD \
+ if (cpu->Num != 0) return A_UNK(cpu); \
offset += cpu->R[(cpu->CurInstr>>16) & 0xF]; \
if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset; \
cpu->Cycles += 1; \
@@ -228,6 +229,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
cpu->R[r+1] = cpu->DataRead32(offset+4); \
#define A_LDRD_POST \
+ if (cpu->Num != 0) return A_UNK(cpu); \
u32 addr = cpu->R[(cpu->CurInstr>>16) & 0xF]; \
cpu->R[(cpu->CurInstr>>16) & 0xF] += offset; \
cpu->Cycles += 1; \
@@ -236,6 +238,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
cpu->R[r+1] = cpu->DataRead32(addr+4); \
#define A_STRD \
+ if (cpu->Num != 0) return A_UNK(cpu); \
offset += cpu->R[(cpu->CurInstr>>16) & 0xF]; \
if (cpu->CurInstr & (1<<21)) cpu->R[(cpu->CurInstr>>16) & 0xF] = offset; \
u32 r = (cpu->CurInstr>>12) & 0xF; \
@@ -243,6 +246,7 @@ A_IMPLEMENT_WB_LDRSTR(LDRB)
cpu->DataWrite32(offset+4, cpu->R[r+1]); \
#define A_STRD_POST \
+ if (cpu->Num != 0) return A_UNK(cpu); \
cpu->R[(cpu->CurInstr>>16) & 0xF] += offset; \
u32 r = (cpu->CurInstr>>12) & 0xF; \
cpu->DataWrite32(offset , cpu->R[r ]); \