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Diffstat (limited to 'src/NDS.cpp')
-rw-r--r--src/NDS.cpp105
1 files changed, 87 insertions, 18 deletions
diff --git a/src/NDS.cpp b/src/NDS.cpp
index 7b6a450..56e7566 100644
--- a/src/NDS.cpp
+++ b/src/NDS.cpp
@@ -574,10 +574,6 @@ void Reset()
KeyCnt = 0;
RCnt = 0;
-#ifdef JIT_ENABLED
- ARMJIT::ResetBlockCache();
-#endif
-
NDSCart::Reset();
GBACart::Reset();
GPU::Reset();
@@ -593,6 +589,10 @@ void Reset()
}
AREngine::Reset();
+
+#ifdef JIT_ENABLED
+ ARMJIT::Reset();
+#endif
}
void Stop()
@@ -1127,6 +1127,9 @@ void Halt()
void MapSharedWRAM(u8 val)
{
+ if (val == WRAMCnt)
+ return;
+
WRAMCnt = val;
switch (WRAMCnt & 0x3)
@@ -1159,6 +1162,11 @@ void MapSharedWRAM(u8 val)
SWRAM_ARM7Mask = 0x7FFF;
break;
}
+
+#ifdef JIT_ENABLED
+ ARMJIT::UpdateMemoryStatus9(0x3000000, 0x3000000 + 0x1000000);
+ ARMJIT::UpdateMemoryStatus7(0x3000000, 0x3000000 + 0x1000000);
+#endif
}
@@ -2020,11 +2028,17 @@ void ARM9Write8(u32 addr, u8 val)
{
case 0x02000000:
*(u8*)&MainRAM[addr & MainRAMMask] = val;
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateMainRAMIfNecessary(addr);
+#endif
return;
case 0x03000000:
if (SWRAM_ARM9)
{
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateSWRAM9IfNecessary(addr);
+#endif
*(u8*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask] = val;
}
return;
@@ -2070,11 +2084,17 @@ void ARM9Write16(u32 addr, u16 val)
{
case 0x02000000:
*(u16*)&MainRAM[addr & MainRAMMask] = val;
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateMainRAMIfNecessary(addr);
+#endif
return;
case 0x03000000:
if (SWRAM_ARM9)
{
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateSWRAM9IfNecessary(addr);
+#endif
*(u16*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask] = val;
}
return;
@@ -2095,7 +2115,12 @@ void ARM9Write16(u32 addr, u16 val)
case 0x00200000: GPU::WriteVRAM_BBG<u16>(addr, val); return;
case 0x00400000: GPU::WriteVRAM_AOBJ<u16>(addr, val); return;
case 0x00600000: GPU::WriteVRAM_BOBJ<u16>(addr, val); return;
- default: GPU::WriteVRAM_LCDC<u16>(addr, val); return;
+ default:
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateLCDCIfNecessary(addr);
+#endif
+ GPU::WriteVRAM_LCDC<u16>(addr, val);
+ return;
}
case 0x07000000:
@@ -2136,11 +2161,17 @@ void ARM9Write32(u32 addr, u32 val)
{
case 0x02000000:
*(u32*)&MainRAM[addr & MainRAMMask] = val;
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateMainRAMIfNecessary(addr);
+#endif
return ;
case 0x03000000:
if (SWRAM_ARM9)
{
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateSWRAM9IfNecessary(addr);
+#endif
*(u32*)&SWRAM_ARM9[addr & SWRAM_ARM9Mask] = val;
}
return;
@@ -2161,7 +2192,12 @@ void ARM9Write32(u32 addr, u32 val)
case 0x00200000: GPU::WriteVRAM_BBG<u32>(addr, val); return;
case 0x00400000: GPU::WriteVRAM_AOBJ<u32>(addr, val); return;
case 0x00600000: GPU::WriteVRAM_BOBJ<u32>(addr, val); return;
- default: GPU::WriteVRAM_LCDC<u32>(addr, val); return;
+ default:
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateLCDCIfNecessary(addr);
+#endif
+ GPU::WriteVRAM_LCDC<u32>(addr, val);
+ return;
}
case 0x07000000:
@@ -2426,30 +2462,38 @@ u32 ARM7Read32(u32 addr)
void ARM7Write8(u32 addr, u8 val)
{
-#ifdef JIT_ENABLED
- ARMJIT::InvalidateByAddr7(addr);
-#endif
-
switch (addr & 0xFF800000)
{
case 0x02000000:
case 0x02800000:
*(u8*)&MainRAM[addr & MainRAMMask] = val;
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateMainRAMIfNecessary(addr);
+#endif
return;
case 0x03000000:
if (SWRAM_ARM7)
{
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateSWRAM7IfNecessary(addr);
+#endif
*(u8*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask] = val;
return;
}
else
{
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateARM7WRAMIfNecessary(addr);
+#endif
*(u8*)&ARM7WRAM[addr & 0xFFFF] = val;
return;
}
case 0x03800000:
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateARM7WRAMIfNecessary(addr);
+#endif
*(u8*)&ARM7WRAM[addr & 0xFFFF] = val;
return;
@@ -2459,6 +2503,9 @@ void ARM7Write8(u32 addr, u8 val)
case 0x06000000:
case 0x06800000:
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateARM7WVRAMIfNecessary(addr);
+#endif
GPU::WriteVRAM_ARM7<u8>(addr, val);
return;
@@ -2489,30 +2536,38 @@ void ARM7Write8(u32 addr, u8 val)
void ARM7Write16(u32 addr, u16 val)
{
-#ifdef JIT_ENABLED
- ARMJIT::InvalidateByAddr7(addr);
-#endif
-
switch (addr & 0xFF800000)
{
case 0x02000000:
case 0x02800000:
*(u16*)&MainRAM[addr & MainRAMMask] = val;
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateMainRAMIfNecessary(addr);
+#endif
return;
case 0x03000000:
if (SWRAM_ARM7)
{
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateSWRAM7IfNecessary(addr);
+#endif
*(u16*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask] = val;
return;
}
else
{
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateARM7WRAMIfNecessary(addr);
+#endif
*(u16*)&ARM7WRAM[addr & 0xFFFF] = val;
return;
}
case 0x03800000:
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateARM7WRAMIfNecessary(addr);
+#endif
*(u16*)&ARM7WRAM[addr & 0xFFFF] = val;
return;
@@ -2530,6 +2585,9 @@ void ARM7Write16(u32 addr, u16 val)
case 0x06000000:
case 0x06800000:
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateARM7WVRAMIfNecessary(addr);
+#endif
GPU::WriteVRAM_ARM7<u16>(addr, val);
return;
@@ -2562,30 +2620,38 @@ void ARM7Write16(u32 addr, u16 val)
void ARM7Write32(u32 addr, u32 val)
{
-#ifdef JIT_ENABLED
- ARMJIT::InvalidateByAddr7(addr);
-#endif
-
switch (addr & 0xFF800000)
{
case 0x02000000:
case 0x02800000:
*(u32*)&MainRAM[addr & MainRAMMask] = val;
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateMainRAMIfNecessary(addr);
+#endif
return;
case 0x03000000:
if (SWRAM_ARM7)
{
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateSWRAM7IfNecessary(addr);
+#endif
*(u32*)&SWRAM_ARM7[addr & SWRAM_ARM7Mask] = val;
return;
}
else
{
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateARM7WRAMIfNecessary(addr);
+#endif
*(u32*)&ARM7WRAM[addr & 0xFFFF] = val;
return;
}
case 0x03800000:
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateARM7WRAMIfNecessary(addr);
+#endif
*(u32*)&ARM7WRAM[addr & 0xFFFF] = val;
return;
@@ -2604,6 +2670,9 @@ void ARM7Write32(u32 addr, u32 val)
case 0x06000000:
case 0x06800000:
+#ifdef JIT_ENABLED
+ ARMJIT::InvalidateARM7WVRAMIfNecessary(addr);
+#endif
GPU::WriteVRAM_ARM7<u32>(addr, val);
return;