diff options
Diffstat (limited to 'src/DSi.cpp')
| -rw-r--r-- | src/DSi.cpp | 140 |
1 files changed, 36 insertions, 104 deletions
diff --git a/src/DSi.cpp b/src/DSi.cpp index f2937b0..5c4b542 100644 --- a/src/DSi.cpp +++ b/src/DSi.cpp @@ -28,10 +28,8 @@ #include "DSi_SPI_TSC.h" #include "Platform.h" -#ifdef JIT_ENABLED #include "ARMJIT.h" #include "ARMJIT_Memory.h" -#endif #include "DSi_NDMA.h" #include "DSi_I2C.h" @@ -99,11 +97,10 @@ void Set_SCFG_MC(u32 val); bool Init() { -#ifndef JIT_ENABLED - NWRAM_A = new u8[NWRAMSize]; - NWRAM_B = new u8[NWRAMSize]; - NWRAM_C = new u8[NWRAMSize]; -#endif + // Memory is owned by ARMJIT_Memory, don't free it + NWRAM_A = NDS::JIT->Memory.GetNWRAM_A(); + NWRAM_B = NDS::JIT->Memory.GetNWRAM_B(); + NWRAM_C = NDS::JIT->Memory.GetNWRAM_C(); NDMAs[0] = new DSi_NDMA(0, 0, *NDS::GPU); NDMAs[1] = new DSi_NDMA(0, 1, *NDS::GPU); @@ -127,15 +124,10 @@ bool Init() void DeInit() { -#ifndef JIT_ENABLED - delete[] NWRAM_A; - delete[] NWRAM_B; - delete[] NWRAM_C; - + // Memory is owned externally NWRAM_A = nullptr; NWRAM_B = nullptr; NWRAM_C = nullptr; -#endif for (int i = 0; i < 8; i++) { @@ -684,10 +676,8 @@ void SoftReset() // also, BPTWL[0x70] could be abused to quickly boot specific titles -#ifdef JIT_ENABLED - ARMJIT_Memory::Reset(); - ARMJIT::CheckAndInvalidateITCM(); -#endif + NDS::JIT->Reset(); + NDS::JIT->CheckAndInvalidateITCM(); NDS::ARM9->Reset(); NDS::ARM7->Reset(); @@ -1043,9 +1033,7 @@ void MapNWRAM_A(u32 num, u8 val) u8 oldval = (MBK[0][mbkn] >> mbks) & 0xFF; if (oldval == val) return; -#ifdef JIT_ENABLED - ARMJIT_Memory::RemapNWRAM(0); -#endif + NDS::JIT->Memory.RemapNWRAM(0); MBK[0][mbkn] &= ~(0xFF << mbks); MBK[0][mbkn] |= (val << mbks); @@ -1090,9 +1078,7 @@ void MapNWRAM_B(u32 num, u8 val) u8 oldval = (MBK[0][mbkn] >> mbks) & 0xFF; if (oldval == val) return; -#ifdef JIT_ENABLED - ARMJIT_Memory::RemapNWRAM(1); -#endif + NDS::JIT->Memory.RemapNWRAM(1); MBK[0][mbkn] &= ~(0xFF << mbks); MBK[0][mbkn] |= (val << mbks); @@ -1139,9 +1125,7 @@ void MapNWRAM_C(u32 num, u8 val) u8 oldval = (MBK[0][mbkn] >> mbks) & 0xFF; if (oldval == val) return; -#ifdef JIT_ENABLED - ARMJIT_Memory::RemapNWRAM(2); -#endif + NDS::JIT->Memory.RemapNWRAM(2); MBK[0][mbkn] &= ~(0xFF << mbks); MBK[0][mbkn] |= (val << mbks); @@ -1190,9 +1174,7 @@ void MapNWRAMRange(u32 cpu, u32 num, u32 val) u32 oldval = MBK[cpu][5+num]; if (oldval == val) return; -#ifdef JIT_ENABLED - ARMJIT_Memory::RemapNWRAM(num); -#endif + NDS::JIT->Memory.RemapNWRAM(num); MBK[cpu][5+num] = val; @@ -1468,9 +1450,7 @@ void ARM9Write8(u32 addr, u8 val) continue; u8* ptr = &NWRAM_A[page * 0x10000]; *(u8*)&ptr[addr & 0xFFFF] = val; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_NewSharedWRAM_A>(addr); -#endif + NDS::JIT->CheckAndInvalidate<0, ARMJIT_Memory::memregion_NewSharedWRAM_A>(addr); } return; } @@ -1488,9 +1468,7 @@ void ARM9Write8(u32 addr, u8 val) continue; u8* ptr = &NWRAM_B[page * 0x8000]; *(u8*)&ptr[addr & 0x7FFF] = val; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_NewSharedWRAM_B>(addr); -#endif + NDS::JIT->CheckAndInvalidate<0, ARMJIT_Memory::memregion_NewSharedWRAM_B>(addr); } return; } @@ -1508,9 +1486,7 @@ void ARM9Write8(u32 addr, u8 val) continue; u8* ptr = &NWRAM_C[page * 0x8000]; *(u8*)&ptr[addr & 0x7FFF] = val; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_NewSharedWRAM_C>(addr); -#endif + NDS::JIT->CheckAndInvalidate<0, ARMJIT_Memory::memregion_NewSharedWRAM_C>(addr); } return; } @@ -1523,9 +1499,7 @@ void ARM9Write8(u32 addr, u8 val) case 0x06000000: if (!(SCFG_EXT[0] & (1<<13))) return; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_VRAM>(addr); -#endif + NDS::JIT->CheckAndInvalidate<0, ARMJIT_Memory::memregion_VRAM>(addr); switch (addr & 0x00E00000) { case 0x00000000: NDS::GPU->WriteVRAM_ABG<u8>(addr, val); return; @@ -1541,9 +1515,7 @@ void ARM9Write8(u32 addr, u8 val) return; case 0x0C000000: -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_MainRAM>(addr); -#endif + NDS::JIT->CheckAndInvalidate<0, ARMJIT_Memory::memregion_MainRAM>(addr); *(u8*)&NDS::MainRAM[addr & NDS::MainRAMMask] = val; return; } @@ -1574,9 +1546,7 @@ void ARM9Write16(u32 addr, u16 val) continue; u8* ptr = &NWRAM_A[page * 0x10000]; *(u16*)&ptr[addr & 0xFFFF] = val; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_NewSharedWRAM_A>(addr); -#endif + NDS::JIT->CheckAndInvalidate<0, ARMJIT_Memory::memregion_NewSharedWRAM_A>(addr); } return; } @@ -1594,9 +1564,7 @@ void ARM9Write16(u32 addr, u16 val) continue; u8* ptr = &NWRAM_B[page * 0x8000]; *(u16*)&ptr[addr & 0x7FFF] = val; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_NewSharedWRAM_B>(addr); -#endif + NDS::JIT->CheckAndInvalidate<0, ARMJIT_Memory::memregion_NewSharedWRAM_B>(addr); } return; } @@ -1614,9 +1582,7 @@ void ARM9Write16(u32 addr, u16 val) continue; u8* ptr = &NWRAM_C[page * 0x8000]; *(u16*)&ptr[addr & 0x7FFF] = val; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_NewSharedWRAM_C>(addr); -#endif + NDS::JIT->CheckAndInvalidate<0, ARMJIT_Memory::memregion_NewSharedWRAM_C>(addr); } return; } @@ -1633,9 +1599,7 @@ void ARM9Write16(u32 addr, u16 val) return; case 0x0C000000: -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_MainRAM>(addr); -#endif + NDS::JIT->CheckAndInvalidate<0, ARMJIT_Memory::memregion_MainRAM>(addr); *(u16*)&NDS::MainRAM[addr & NDS::MainRAMMask] = val; return; } @@ -1666,9 +1630,7 @@ void ARM9Write32(u32 addr, u32 val) continue; u8* ptr = &NWRAM_A[page * 0x10000]; *(u32*)&ptr[addr & 0xFFFF] = val; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_NewSharedWRAM_A>(addr); -#endif + NDS::JIT->CheckAndInvalidate<0, ARMJIT_Memory::memregion_NewSharedWRAM_A>(addr); } return; } @@ -1686,9 +1648,7 @@ void ARM9Write32(u32 addr, u32 val) continue; u8* ptr = &NWRAM_B[page * 0x8000]; *(u32*)&ptr[addr & 0x7FFF] = val; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_NewSharedWRAM_B>(addr); -#endif + NDS::JIT->CheckAndInvalidate<0, ARMJIT_Memory::memregion_NewSharedWRAM_B>(addr); } return; } @@ -1706,9 +1666,7 @@ void ARM9Write32(u32 addr, u32 val) continue; u8* ptr = &NWRAM_C[page * 0x8000]; *(u32*)&ptr[addr & 0x7FFF] = val; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_NewSharedWRAM_C>(addr); -#endif + NDS::JIT->CheckAndInvalidate<0, ARMJIT_Memory::memregion_NewSharedWRAM_C>(addr); } return; } @@ -1725,9 +1683,7 @@ void ARM9Write32(u32 addr, u32 val) return; case 0x0C000000: -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<0, ARMJIT_Memory::memregion_MainRAM>(addr); -#endif + NDS::JIT->CheckAndInvalidate<0, ARMJIT_Memory::memregion_MainRAM>(addr); *(u32*)&NDS::MainRAM[addr & NDS::MainRAMMask] = val; return; } @@ -1970,9 +1926,7 @@ void ARM7Write8(u32 addr, u8 val) continue; u8* ptr = &NWRAM_A[page * 0x10000]; *(u8*)&ptr[addr & 0xFFFF] = val; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_NewSharedWRAM_A>(addr); -#endif + NDS::JIT->CheckAndInvalidate<1, ARMJIT_Memory::memregion_NewSharedWRAM_A>(addr); } return; } @@ -1990,9 +1944,7 @@ void ARM7Write8(u32 addr, u8 val) continue; u8* ptr = &NWRAM_B[page * 0x8000]; *(u8*)&ptr[addr & 0x7FFF] = val; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_NewSharedWRAM_B>(addr); -#endif + NDS::JIT->CheckAndInvalidate<1, ARMJIT_Memory::memregion_NewSharedWRAM_B>(addr); } return; } @@ -2010,9 +1962,7 @@ void ARM7Write8(u32 addr, u8 val) continue; u8* ptr = &NWRAM_C[page * 0x8000]; *(u8*)&ptr[addr & 0x7FFF] = val; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_NewSharedWRAM_C>(addr); -#endif + NDS::JIT->CheckAndInvalidate<1, ARMJIT_Memory::memregion_NewSharedWRAM_C>(addr); } return; } @@ -2033,9 +1983,7 @@ void ARM7Write8(u32 addr, u8 val) case 0x0C000000: case 0x0C800000: -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_MainRAM>(addr); -#endif + NDS::JIT->CheckAndInvalidate<1, ARMJIT_Memory::memregion_MainRAM>(addr); *(u8*)&NDS::MainRAM[addr & NDS::MainRAMMask] = val; return; } @@ -2067,9 +2015,7 @@ void ARM7Write16(u32 addr, u16 val) continue; u8* ptr = &NWRAM_A[page * 0x10000]; *(u16*)&ptr[addr & 0xFFFF] = val; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_NewSharedWRAM_A>(addr); -#endif + NDS::JIT->CheckAndInvalidate<1, ARMJIT_Memory::memregion_NewSharedWRAM_A>(addr); } return; } @@ -2087,9 +2033,7 @@ void ARM7Write16(u32 addr, u16 val) continue; u8* ptr = &NWRAM_B[page * 0x8000]; *(u16*)&ptr[addr & 0x7FFF] = val; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_NewSharedWRAM_B>(addr); -#endif + NDS::JIT->CheckAndInvalidate<1, ARMJIT_Memory::memregion_NewSharedWRAM_B>(addr); } return; } @@ -2107,9 +2051,7 @@ void ARM7Write16(u32 addr, u16 val) continue; u8* ptr = &NWRAM_C[page * 0x8000]; *(u16*)&ptr[addr & 0x7FFF] = val; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_NewSharedWRAM_C>(addr); -#endif + NDS::JIT->CheckAndInvalidate<1, ARMJIT_Memory::memregion_NewSharedWRAM_C>(addr); } return; } @@ -2130,9 +2072,7 @@ void ARM7Write16(u32 addr, u16 val) case 0x0C000000: case 0x0C800000: -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_MainRAM>(addr); -#endif + NDS::JIT->CheckAndInvalidate<1, ARMJIT_Memory::memregion_MainRAM>(addr); *(u16*)&NDS::MainRAM[addr & NDS::MainRAMMask] = val; return; } @@ -2164,9 +2104,7 @@ void ARM7Write32(u32 addr, u32 val) continue; u8* ptr = &NWRAM_A[page * 0x10000]; *(u32*)&ptr[addr & 0xFFFF] = val; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_NewSharedWRAM_A>(addr); -#endif + NDS::JIT->CheckAndInvalidate<1, ARMJIT_Memory::memregion_NewSharedWRAM_A>(addr); } return; } @@ -2184,9 +2122,7 @@ void ARM7Write32(u32 addr, u32 val) continue; u8* ptr = &NWRAM_B[page * 0x8000]; *(u32*)&ptr[addr & 0x7FFF] = val; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_NewSharedWRAM_B>(addr); -#endif + NDS::JIT->CheckAndInvalidate<1, ARMJIT_Memory::memregion_NewSharedWRAM_B>(addr); } return; } @@ -2204,9 +2140,7 @@ void ARM7Write32(u32 addr, u32 val) continue; u8* ptr = &NWRAM_C[page * 0x8000]; *(u32*)&ptr[addr & 0x7FFF] = val; -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_NewSharedWRAM_C>(addr); -#endif + NDS::JIT->CheckAndInvalidate<1, ARMJIT_Memory::memregion_NewSharedWRAM_C>(addr); } return; } @@ -2227,9 +2161,7 @@ void ARM7Write32(u32 addr, u32 val) case 0x0C000000: case 0x0C800000: -#ifdef JIT_ENABLED - ARMJIT::CheckAndInvalidate<1, ARMJIT_Memory::memregion_MainRAM>(addr); -#endif + NDS::JIT->CheckAndInvalidate<1, ARMJIT_Memory::memregion_MainRAM>(addr); *(u32*)&NDS::MainRAM[addr & NDS::MainRAMMask] = val; return; } |