4 files changed, 26 insertions, 23 deletions

diff --git a/src/ARMJIT_A64/ARMJIT_Compiler.cpp b/src/ARMJIT_A64/ARMJIT_Compiler.cpp
index 80c7f04..5fe3fe7 100644
--- a/src/ARMJIT_A64/ARMJIT_Compiler.cpp
+++ b/src/ARMJIT_A64/ARMJIT_Compiler.cpp
@@ -1,5 +1,11 @@
+#include "ARMJIT_Compiler.h"
+
+#include "../ARMJIT_Internal.h"
+#include "../ARMInterpreter.h"
+#include "../Config.h"
+
 #ifdef __SWITCH__
-#include "../switch/compat_switch.h"
+#include <switch.h>
 
 extern char __start__;
 #else
@@ -7,13 +13,7 @@ extern char __start__;
 #include <unistd.h>
 #endif
 
-#include "ARMJIT_Compiler.h"
-
-#include "../ARMJIT_Internal.h"
-#include "../ARMInterpreter.h"
-#include "../Config.h"
-
-#include <malloc.h>
+#include <stdlib.h>
 
 using namespace Arm64Gen;
 
@@ -68,6 +68,11 @@ void Compiler::A_Comp_MRS()
         MOV(rd, RCPSR);
 }
 
+void UpdateModeTrampoline(ARM* arm, u32 oldmode, u32 newmode)
+{
+    arm->UpdateMode(oldmode, newmode);
+}
+
 void Compiler::A_Comp_MSR()
 {
     Comp_AddCycles_C();
@@ -139,7 +144,7 @@ void Compiler::A_Comp_MSR()
 
             PushRegs(true);
 
-            QuickCallFunction(X3, (void*)&ARM::UpdateMode);
+            QuickCallFunction(X3, (void*)&UpdateModeTrampoline);
         
             PopRegs(true);
         }
@@ -179,7 +184,7 @@ void Compiler::PopRegs(bool saveHiRegs)
 Compiler::Compiler()
 {
 #ifdef __SWITCH__
-    JitRWBase = memalign(0x1000, JitMemSize);
+    JitRWBase = aligned_alloc(0x1000, JitMemSize);
 
     JitRXStart = (u8*)&__start__ - JitMemSize - 0x1000;
     JitRWStart = virtmemReserve(JitMemSize);
@@ -915,4 +920,4 @@ void Compiler::Comp_AddCycles_CD()
         ConstantCycles += cycles;
 }
 
-}
\ No newline at end of file
+}
diff --git a/src/ARMJIT_A64/ARMJIT_Compiler.h b/src/ARMJIT_A64/ARMJIT_Compiler.h
index af7497a..a79e9da 100644
--- a/src/ARMJIT_A64/ARMJIT_Compiler.h
+++ b/src/ARMJIT_A64/ARMJIT_Compiler.h
@@ -187,6 +187,7 @@ public:
     void Comp_RegShiftReg(int op, bool S, Op2& op2, Arm64Gen::ARM64Reg rs);
 
     bool Comp_MemLoadLiteral(int size, bool signExtend, int rd, u32 addr);
+
     enum
     {
         memop_Writeback = 1 << 0,
@@ -213,8 +214,8 @@ public:
         return (u8*)entry - GetRXBase();
     }
 
-    bool IsJITFault(u64 pc);
-    s64 RewriteMemAccess(u64 pc);
+    bool IsJITFault(u8* pc);
+    u8* RewriteMemAccess(u8* pc);
 
     void SwapCodeRegion()
     {
diff --git a/src/ARMJIT_A64/ARMJIT_Linkage.s b/src/ARMJIT_A64/ARMJIT_Linkage.S
index 7886315..7886315 100644
--- a/src/ARMJIT_A64/ARMJIT_Linkage.s
+++ b/src/ARMJIT_A64/ARMJIT_Linkage.S
diff --git a/src/ARMJIT_A64/ARMJIT_LoadStore.cpp b/src/ARMJIT_A64/ARMJIT_LoadStore.cpp
index 86e257a..2c14dc6 100644
--- a/src/ARMJIT_A64/ARMJIT_LoadStore.cpp
+++ b/src/ARMJIT_A64/ARMJIT_LoadStore.cpp
@@ -9,37 +9,34 @@ using namespace Arm64Gen;
 namespace ARMJIT
 {
 
-bool Compiler::IsJITFault(u64 pc)
+bool Compiler::IsJITFault(u8* pc)
 {
-    return pc >= (u64)GetRXBase() && pc - (u64)GetRXBase() < (JitMemMainSize + JitMemSecondarySize);
+    return (u64)pc >= (u64)GetRXBase() && (u64)pc - (u64)GetRXBase() < (JitMemMainSize + JitMemSecondarySize);
 }
 
-s64 Compiler::RewriteMemAccess(u64 pc)
+u8* Compiler::RewriteMemAccess(u8* pc)
 {
-    ptrdiff_t pcOffset = pc - (u64)GetRXBase();
+    ptrdiff_t pcOffset = pc - GetRXBase();
 
     auto it = LoadStorePatches.find(pcOffset);
 
     if (it != LoadStorePatches.end())
     {
         LoadStorePatch patch = it->second;
+        LoadStorePatches.erase(it);
 
         ptrdiff_t curCodeOffset = GetCodeOffset();
 
         SetCodePtrUnsafe(pcOffset + patch.PatchOffset);
 
         BL(patch.PatchFunc);
-
         for (int i = 0; i < patch.PatchSize / 4 - 1; i++)
             HINT(HINT_NOP);
-
         FlushIcacheSection((u8*)pc + patch.PatchOffset, (u8*)GetRXPtr());
 
         SetCodePtrUnsafe(curCodeOffset);
 
-        LoadStorePatches.erase(it);
-
-        return patch.PatchOffset;
+        return pc + (ptrdiff_t)patch.PatchOffset;
     }
     printf("this is a JIT bug! %08x\n", __builtin_bswap32(*(u32*)pc));
     abort();
@@ -192,7 +189,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, Op2 offset, int size, int flags)
         else
         {
             LDRGeneric(size, flags & memop_SignExtend, rdMapped, size > 8 ? X1 : X0, X7);
-            if (size == 32)
+            if (size == 32 && !addrIsStatic)
             {
                 UBFIZ(W0, W0, 3, 2);
                 RORV(rdMapped, rdMapped, W0);