diff options
| -rw-r--r-- | src/ARM.h | 31 | ||||
| -rw-r--r-- | src/CP15.cpp | 31 | ||||
| -rw-r--r-- | src/DSi.cpp | 393 | ||||
| -rw-r--r-- | src/DSi.h | 33 | ||||
| -rw-r--r-- | src/NDS.cpp | 65 | ||||
| -rw-r--r-- | src/sha1/sha1.c | 17 | ||||
| -rw-r--r-- | src/sha1/sha1.h | 10 |
7 files changed, 518 insertions, 62 deletions
@@ -23,6 +23,7 @@ #include "types.h" #include "NDS.h" +#include "DSi.h" #define ROR(x, n) (((x) >> (n)) | ((x) << (32-(n)))) @@ -271,17 +272,20 @@ public: u16 CodeRead16(u32 addr) { - return NDS::ARM7Read16(addr); + //return NDS::ARM7Read16(addr); + return DSi::ARM7Read16(addr); } u32 CodeRead32(u32 addr) { - return NDS::ARM7Read32(addr); + //return NDS::ARM7Read32(addr); + return DSi::ARM7Read32(addr); } void DataRead8(u32 addr, u32* val) { - *val = NDS::ARM7Read8(addr); + *val = DSi::ARM7Read8(addr); + //*val = NDS::ARM7Read8(addr); DataRegion = addr >> 24; DataCycles = NDS::ARM7MemTimings[DataRegion][0]; } @@ -290,7 +294,8 @@ public: { addr &= ~1; - *val = NDS::ARM7Read16(addr); + *val = DSi::ARM7Read16(addr); + //*val = NDS::ARM7Read16(addr); DataRegion = addr >> 24; DataCycles = NDS::ARM7MemTimings[DataRegion][0]; } @@ -299,7 +304,8 @@ public: { addr &= ~3; - *val = NDS::ARM7Read32(addr); + *val = DSi::ARM7Read32(addr); + //*val = NDS::ARM7Read32(addr); DataRegion = addr >> 24; DataCycles = NDS::ARM7MemTimings[DataRegion][2]; } @@ -308,13 +314,15 @@ public: { addr &= ~3; - *val = NDS::ARM7Read32(addr); + *val = DSi::ARM7Read32(addr); + //*val = NDS::ARM7Read32(addr); DataCycles += NDS::ARM7MemTimings[DataRegion][3]; } void DataWrite8(u32 addr, u8 val) { - NDS::ARM7Write8(addr, val); + DSi::ARM7Write8(addr, val); + //NDS::ARM7Write8(addr, val); DataRegion = addr >> 24; DataCycles = NDS::ARM7MemTimings[DataRegion][0]; } @@ -323,7 +331,8 @@ public: { addr &= ~1; - NDS::ARM7Write16(addr, val); + DSi::ARM7Write16(addr, val); + //NDS::ARM7Write16(addr, val); DataRegion = addr >> 24; DataCycles = NDS::ARM7MemTimings[DataRegion][0]; } @@ -332,7 +341,8 @@ public: { addr &= ~3; - NDS::ARM7Write32(addr, val); + DSi::ARM7Write32(addr, val); + //NDS::ARM7Write32(addr, val); DataRegion = addr >> 24; DataCycles = NDS::ARM7MemTimings[DataRegion][2]; } @@ -341,7 +351,8 @@ public: { addr &= ~3; - NDS::ARM7Write32(addr, val); + DSi::ARM7Write32(addr, val); + //NDS::ARM7Write32(addr, val); DataCycles += NDS::ARM7MemTimings[DataRegion][3]; } diff --git a/src/CP15.cpp b/src/CP15.cpp index a4db5f3..4654a2a 100644 --- a/src/CP15.cpp +++ b/src/CP15.cpp @@ -19,6 +19,7 @@ #include <stdio.h> #include <string.h> #include "NDS.h" +#include "DSi.h" #include "ARM.h" @@ -680,7 +681,8 @@ u32 ARMv5::CodeRead32(u32 addr, bool branch) if (CodeMem.Mem) return *(u32*)&CodeMem.Mem[addr & CodeMem.Mask]; - return NDS::ARM9Read32(addr); + //return NDS::ARM9Read32(addr); + return DSi::ARM9Read32(addr); } @@ -699,7 +701,8 @@ void ARMv5::DataRead8(u32 addr, u32* val) return; } - *val = NDS::ARM9Read8(addr); + *val = DSi::ARM9Read8(addr); + //*val = NDS::ARM9Read8(addr); DataCycles = MemTimings[addr >> 12][1]; } @@ -720,7 +723,8 @@ void ARMv5::DataRead16(u32 addr, u32* val) return; } - *val = NDS::ARM9Read16(addr); + *val = DSi::ARM9Read16(addr); + //*val = NDS::ARM9Read16(addr); DataCycles = MemTimings[addr >> 12][1]; } @@ -741,7 +745,8 @@ void ARMv5::DataRead32(u32 addr, u32* val) return; } - *val = NDS::ARM9Read32(addr); + *val = DSi::ARM9Read32(addr); + //*val = NDS::ARM9Read32(addr); DataCycles = MemTimings[addr >> 12][2]; } @@ -762,7 +767,8 @@ void ARMv5::DataRead32S(u32 addr, u32* val) return; } - *val = NDS::ARM9Read32(addr); + *val = DSi::ARM9Read32(addr); + //*val = NDS::ARM9Read32(addr); DataCycles += MemTimings[addr >> 12][3]; } @@ -781,7 +787,8 @@ void ARMv5::DataWrite8(u32 addr, u8 val) return; } - NDS::ARM9Write8(addr, val); + DSi::ARM9Write8(addr, val); + //NDS::ARM9Write8(addr, val); DataCycles = MemTimings[addr >> 12][1]; } @@ -802,7 +809,8 @@ void ARMv5::DataWrite16(u32 addr, u16 val) return; } - NDS::ARM9Write16(addr, val); + DSi::ARM9Write16(addr, val); + //NDS::ARM9Write16(addr, val); DataCycles = MemTimings[addr >> 12][1]; } @@ -823,7 +831,8 @@ void ARMv5::DataWrite32(u32 addr, u32 val) return; } - NDS::ARM9Write32(addr, val); + DSi::ARM9Write32(addr, val); + //NDS::ARM9Write32(addr, val); DataCycles = MemTimings[addr >> 12][2]; } @@ -844,7 +853,8 @@ void ARMv5::DataWrite32S(u32 addr, u32 val) return; } - NDS::ARM9Write32(addr, val); + DSi::ARM9Write32(addr, val); + //NDS::ARM9Write32(addr, val); DataCycles += MemTimings[addr >> 12][3]; } @@ -857,6 +867,7 @@ void ARMv5::GetCodeMemRegion(u32 addr, NDS::MemRegion* region) return; }*/ - NDS::ARM9GetMemRegion(addr, false, &CodeMem); + DSi::ARM9GetMemRegion(addr, false, &CodeMem); + //NDS::ARM9GetMemRegion(addr, false, &CodeMem); } diff --git a/src/DSi.cpp b/src/DSi.cpp index 376e6a0..8026e49 100644 --- a/src/DSi.cpp +++ b/src/DSi.cpp @@ -16,18 +16,409 @@ with melonDS. If not, see http://www.gnu.org/licenses/. */ +#include "NDS.h" #include "DSi.h" #include "tiny-AES-c/aes.hpp" #include "sha1/sha1.h" +#include "Platform.h" + namespace DSi { +// + + +bool LoadBIOS() +{ + FILE* f; + u32 i; + + f = Platform::OpenLocalFile("bios9i.bin", "rb"); + if (!f) + { + printf("ARM9i BIOS not found\n"); + + for (i = 0; i < 16; i++) + ((u32*)NDS::ARM9BIOS)[i] = 0xE7FFDEFF; + } + else + { + fseek(f, 0, SEEK_SET); + fread(NDS::ARM9BIOS, 0x10000, 1, f); + + printf("ARM9i BIOS loaded\n"); + fclose(f); + } + + f = Platform::OpenLocalFile("bios7i.bin", "rb"); + if (!f) + { + printf("ARM7i BIOS not found\n"); + + for (i = 0; i < 16; i++) + ((u32*)NDS::ARM7BIOS)[i] = 0xE7FFDEFF; + } + else + { + // TODO: check if the first 32 bytes are crapoed + + fseek(f, 0, SEEK_SET); + fread(NDS::ARM7BIOS, 0x10000, 1, f); + + printf("ARM7i BIOS loaded\n"); + fclose(f); + } + + // herp + *(u32*)&NDS::ARM9BIOS[0] = 0xEAFFFFFE; + *(u32*)&NDS::ARM7BIOS[0] = 0xEAFFFFFE; + + return true; +} + bool LoadNAND() { - // + printf("Loading DSi NAND\n"); + + FILE* f = Platform::OpenLocalFile("nand.bin", "rb"); + if (f) + { + u32 bootparams[8]; + fseek(f, 0x220, SEEK_SET); + fread(bootparams, 4, 8, f); + + printf("ARM9: offset=%08X size=%08X RAM=%08X size_aligned=%08X\n", + bootparams[0], bootparams[1], bootparams[2], bootparams[3]); + printf("ARM7: offset=%08X size=%08X RAM=%08X size_aligned=%08X\n", + bootparams[4], bootparams[5], bootparams[6], bootparams[7]); + +#define printhex(str, size) { for (int z = 0; z < (size); z++) printf("%02X", (str)[z]); printf("\n"); } +#define printhex_rev(str, size) { for (int z = (size)-1; z >= 0; z--) printf("%02X", (str)[z]); printf("\n"); } + + u8 emmc_cid[16]; + u8 consoleid[8]; + fseek(f, 0xF000010, SEEK_SET); + fread(emmc_cid, 1, 16, f); + fread(consoleid, 1, 8, f); + + printf("eMMC CID: "); printhex(emmc_cid, 16); + printf("Console ID: "); printhex_rev(consoleid, 8); + + fclose(f); + } return true; } + +u8 ARM9Read8(u32 addr) +{ + switch (addr & 0xFF000000) + { + case 0x04000000: + return ARM9IORead8(addr); + } + + return NDS::ARM9Read8(addr); +} + +u16 ARM9Read16(u32 addr) +{ + switch (addr & 0xFF000000) + { + case 0x04000000: + return ARM9IORead16(addr); + } + + return NDS::ARM9Read16(addr); +} + +u32 ARM9Read32(u32 addr) +{ + switch (addr & 0xFF000000) + { + case 0x04000000: + return ARM9IORead32(addr); + } + + return NDS::ARM9Read32(addr); +} + +void ARM9Write8(u32 addr, u8 val) +{ + switch (addr & 0xFF000000) + { + case 0x04000000: + ARM9IOWrite8(addr, val); + return; + } + + return NDS::ARM9Write8(addr, val); +} + +void ARM9Write16(u32 addr, u16 val) +{ + switch (addr & 0xFF000000) + { + case 0x04000000: + ARM9IOWrite16(addr, val); + return; + } + + return NDS::ARM9Write16(addr, val); +} + +void ARM9Write32(u32 addr, u32 val) +{ + switch (addr & 0xFF000000) + { + case 0x04000000: + ARM9IOWrite32(addr, val); + return; + } + + return NDS::ARM9Write32(addr, val); +} + +bool ARM9GetMemRegion(u32 addr, bool write, NDS::MemRegion* region) +{ + switch (addr & 0xFF000000) + { + case 0x02000000: + region->Mem = NDS::MainRAM; + region->Mask = MAIN_RAM_SIZE-1; + return true; + } + + if ((addr & 0xFFFF0000) == 0xFFFF0000 && !write) + { + region->Mem = NDS::ARM9BIOS; + region->Mask = 0xFFFF; + return true; + } + + region->Mem = NULL; + return false; +} + + + +u8 ARM7Read8(u32 addr) +{ + switch (addr & 0xFF800000) + { + case 0x04000000: + return ARM7IORead8(addr); + } + + return NDS::ARM7Read8(addr); +} + +u16 ARM7Read16(u32 addr) +{ + switch (addr & 0xFF800000) + { + case 0x04000000: + return ARM7IORead16(addr); + } + + return NDS::ARM7Read16(addr); +} + +u32 ARM7Read32(u32 addr) +{ + switch (addr & 0xFF800000) + { + case 0x04000000: + return ARM7IORead32(addr); + } + + return NDS::ARM7Read32(addr); +} + +void ARM7Write8(u32 addr, u8 val) +{ + switch (addr & 0xFF800000) + { + case 0x04000000: + ARM7IOWrite8(addr, val); + return; + } + + return NDS::ARM7Write8(addr, val); +} + +void ARM7Write16(u32 addr, u16 val) +{ + switch (addr & 0xFF800000) + { + case 0x04000000: + ARM7IOWrite16(addr, val); + return; + } + + return NDS::ARM7Write16(addr, val); +} + +void ARM7Write32(u32 addr, u32 val) +{ + switch (addr & 0xFF800000) + { + case 0x04000000: + ARM7IOWrite32(addr, val); + return; + } + + return NDS::ARM7Write32(addr, val); +} + +bool ARM7GetMemRegion(u32 addr, bool write, NDS::MemRegion* region) +{ + switch (addr & 0xFF800000) + { + case 0x02000000: + case 0x02800000: + region->Mem = NDS::MainRAM; + region->Mask = MAIN_RAM_SIZE-1; + return true; + } + + // BIOS. ARM7 PC has to be within range. + /*if (addr < 0x00010000 && !write) + { + if (NDS::ARM7->R[15] < 0x00010000 && (addr >= NDS::ARM7BIOSProt || NDS::ARM7->R[15] < NDS::ARM7BIOSProt)) + { + region->Mem = NDS::ARM7BIOS; + region->Mask = 0xFFFF; + return true; + } + }*/ + + region->Mem = NULL; + return false; +} + + + + +#define CASE_READ8_16BIT(addr, val) \ + case (addr): return (val) & 0xFF; \ + case (addr+1): return (val) >> 8; + +#define CASE_READ8_32BIT(addr, val) \ + case (addr): return (val) & 0xFF; \ + case (addr+1): return ((val) >> 8) & 0xFF; \ + case (addr+2): return ((val) >> 16) & 0xFF; \ + case (addr+3): return (val) >> 24; + +u8 ARM9IORead8(u32 addr) +{ + switch (addr) + { + } + + return NDS::ARM9IORead8(addr); +} + +u16 ARM9IORead16(u32 addr) +{ + switch (addr) + { + } + + return NDS::ARM9IORead16(addr); +} + +u32 ARM9IORead32(u32 addr) +{ + switch (addr) + { + } + + return NDS::ARM9IORead32(addr); +} + +void ARM9IOWrite8(u32 addr, u8 val) +{ + switch (addr) + { + } + + return NDS::ARM9IOWrite8(addr, val); +} + +void ARM9IOWrite16(u32 addr, u16 val) +{ + switch (addr) + { + } + + return NDS::ARM9IOWrite16(addr, val); +} + +void ARM9IOWrite32(u32 addr, u32 val) +{ + switch (addr) + { + } + + return NDS::ARM9IOWrite32(addr, val); +} + + +u8 ARM7IORead8(u32 addr) +{ + switch (addr) + { + } + + return NDS::ARM7IORead8(addr); +} + +u16 ARM7IORead16(u32 addr) +{ + switch (addr) + { + } + + return NDS::ARM7IORead16(addr); +} + +u32 ARM7IORead32(u32 addr) +{ + switch (addr) + { + } + + return NDS::ARM7IORead32(addr); +} + +void ARM7IOWrite8(u32 addr, u8 val) +{ + switch (addr) + { + } + + return NDS::ARM7IOWrite8(addr, val); +} + +void ARM7IOWrite16(u32 addr, u16 val) +{ + switch (addr) + { + } + + return NDS::ARM7IOWrite16(addr, val); +} + +void ARM7IOWrite32(u32 addr, u32 val) +{ + switch (addr) + { + } + + return NDS::ARM7IOWrite32(addr, val); +} + } @@ -24,8 +24,41 @@ namespace DSi { +bool LoadBIOS(); bool LoadNAND(); +u8 ARM9Read8(u32 addr); +u16 ARM9Read16(u32 addr); +u32 ARM9Read32(u32 addr); +void ARM9Write8(u32 addr, u8 val); +void ARM9Write16(u32 addr, u16 val); +void ARM9Write32(u32 addr, u32 val); + +bool ARM9GetMemRegion(u32 addr, bool write, NDS::MemRegion* region); + +u8 ARM7Read8(u32 addr); +u16 ARM7Read16(u32 addr); +u32 ARM7Read32(u32 addr); +void ARM7Write8(u32 addr, u8 val); +void ARM7Write16(u32 addr, u16 val); +void ARM7Write32(u32 addr, u32 val); + +bool ARM7GetMemRegion(u32 addr, bool write, NDS::MemRegion* region); + +u8 ARM9IORead8(u32 addr); +u16 ARM9IORead16(u32 addr); +u32 ARM9IORead32(u32 addr); +void ARM9IOWrite8(u32 addr, u8 val); +void ARM9IOWrite16(u32 addr, u16 val); +void ARM9IOWrite32(u32 addr, u32 val); + +u8 ARM7IORead8(u32 addr); +u16 ARM7IORead16(u32 addr); +u32 ARM7IORead32(u32 addr); +void ARM7IOWrite8(u32 addr, u8 val); +void ARM7IOWrite16(u32 addr, u16 val); +void ARM7IOWrite32(u32 addr, u32 val); + } #endif // DSI_H diff --git a/src/NDS.cpp b/src/NDS.cpp index f00665e..5481f6f 100644 --- a/src/NDS.cpp +++ b/src/NDS.cpp @@ -392,44 +392,51 @@ void Reset() memset(ARM9BIOS, 0, 0x10000); memset(ARM7BIOS, 0, 0x10000); - f = Platform::OpenLocalFile("bios9.bin", "rb"); - if (!f) + if (true) { - printf("ARM9 BIOS not found\n"); + DSi::LoadBIOS(); + DSi::LoadNAND(); - for (i = 0; i < 16; i++) - ((u32*)ARM9BIOS)[i] = 0xE7FFDEFF; + ARM9ClockShift = 2; } else { - fseek(f, 0, SEEK_SET); - fread(ARM9BIOS, 0x1000, 1, f); + f = Platform::OpenLocalFile("bios9.bin", "rb"); + if (!f) + { + printf("ARM9 BIOS not found\n"); - printf("ARM9 BIOS loaded\n"); - fclose(f); - } + for (i = 0; i < 16; i++) + ((u32*)ARM9BIOS)[i] = 0xE7FFDEFF; + } + else + { + fseek(f, 0, SEEK_SET); + fread(ARM9BIOS, 0x1000, 1, f); - f = Platform::OpenLocalFile("bios7.bin", "rb"); - if (!f) - { - printf("ARM7 BIOS not found\n"); + printf("ARM9 BIOS loaded\n"); + fclose(f); + } - for (i = 0; i < 16; i++) - ((u32*)ARM7BIOS)[i] = 0xE7FFDEFF; - } - else - { - fseek(f, 0, SEEK_SET); - fread(ARM7BIOS, 0x4000, 1, f); + f = Platform::OpenLocalFile("bios7.bin", "rb"); + if (!f) + { + printf("ARM7 BIOS not found\n"); - printf("ARM7 BIOS loaded\n"); - fclose(f); - } + for (i = 0; i < 16; i++) + ((u32*)ARM7BIOS)[i] = 0xE7FFDEFF; + } + else + { + fseek(f, 0, SEEK_SET); + fread(ARM7BIOS, 0x4000, 1, f); - DSi::LoadNAND(); + printf("ARM7 BIOS loaded\n"); + fclose(f); + } - // TODO for later: configure this when emulating a DSi - ARM9ClockShift = 1; + ARM9ClockShift = 1; + } ARM9Timestamp = 0; ARM9Target = 0; ARM7Timestamp = 0; ARM7Target = 0; @@ -443,8 +450,8 @@ void Reset() MapSharedWRAM(0); - ExMemCnt[0] = 0; - ExMemCnt[1] = 0; + ExMemCnt[0] = 0x4000; + ExMemCnt[1] = 0x4000; memset(ROMSeed0, 0, 2*8); memset(ROMSeed1, 0, 2*8); SetGBASlotTimings(); diff --git a/src/sha1/sha1.c b/src/sha1/sha1.c index 2c50433..3729550 100644 --- a/src/sha1/sha1.c +++ b/src/sha1/sha1.c @@ -42,7 +42,8 @@ A million repetitions of "a" #if defined(vax) || defined(ns32000) || defined(sun386) || defined(__i386__) || \ defined(MIPSEL) || defined(_MIPSEL) || defined(BIT_ZERO_ON_RIGHT) || \ - defined(__alpha__) || defined(__alpha) + defined(__alpha__) || defined(__alpha) || \ + defined(__WIN32__) #define BYTE_ORDER LITTLE_ENDIAN #endif @@ -103,12 +104,12 @@ A million repetitions of "a" /* Hash a single 512-bit block. This is the core of the algorithm. */ -void SHA1Transform(u_int32_t state[5], const unsigned char buffer[64]) +void SHA1Transform(uint32_t state[5], const unsigned char buffer[64]) { -u_int32_t a, b, c, d, e; +uint32_t a, b, c, d, e; typedef union { unsigned char c[64]; - u_int32_t l[16]; + uint32_t l[16]; } CHAR64LONG16; #ifdef SHA1HANDSOFF CHAR64LONG16 block[1]; /* use array to appear as a pointer */ @@ -178,10 +179,10 @@ void SHA1Init(SHA1_CTX* context) /* Run your data through this. */ -void SHA1Update(SHA1_CTX* context, const unsigned char* data, u_int32_t len) +void SHA1Update(SHA1_CTX* context, const unsigned char* data, uint32_t len) { -u_int32_t i; -u_int32_t j; +uint32_t i; +uint32_t j; j = context->count[0]; if ((context->count[0] += len << 3) < j) @@ -219,7 +220,7 @@ unsigned char c; for (i = 0; i < 2; i++) { - u_int32_t t = context->count[i]; + uint32_t t = context->count[i]; int j; for (j = 0; j < 4; t >>= 8, j++) diff --git a/src/sha1/sha1.h b/src/sha1/sha1.h index 9d6f129..56ffa56 100644 --- a/src/sha1/sha1.h +++ b/src/sha1/sha1.h @@ -5,13 +5,15 @@ By Steve Reid <steve@edmweb.com> 100% Public Domain */ +#include <stdint.h> + typedef struct { - u_int32_t state[5]; - u_int32_t count[2]; + uint32_t state[5]; + uint32_t count[2]; unsigned char buffer[64]; } SHA1_CTX; -void SHA1Transform(u_int32_t state[5], const unsigned char buffer[64]); +void SHA1Transform(uint32_t state[5], const unsigned char buffer[64]); void SHA1Init(SHA1_CTX* context); -void SHA1Update(SHA1_CTX* context, const unsigned char* data, u_int32_t len); +void SHA1Update(SHA1_CTX* context, const unsigned char* data, uint32_t len); void SHA1Final(unsigned char digest[20], SHA1_CTX* context); |