diff options
| author | RSDuck <rsduck@users.noreply.github.com> | 2019-06-25 18:28:01 +0200 |
|---|---|---|
| committer | RSDuck <rsduck@users.noreply.github.com> | 2020-04-26 13:02:55 +0200 |
| commit | ff901141e77ad6c8d2910d77bef2b7c5674fcc7f (patch) | |
| tree | 46f1ed3e5a303fb77f0d702471376e5e59a47cd4 /src | |
| parent | ebce9f035ff05b414f1bb895beabb62bc539ac76 (diff) | |
jit: correct cycle counting for thumb shift by reg
Diffstat (limited to 'src')
| -rw-r--r-- | src/ARMJIT_x64/ARMJIT_ALU.cpp | 7 | ||||
| -rw-r--r-- | src/ARMJIT_x64/ARMJIT_LoadStore.cpp | 0 |
2 files changed, 5 insertions, 2 deletions
diff --git a/src/ARMJIT_x64/ARMJIT_ALU.cpp b/src/ARMJIT_x64/ARMJIT_ALU.cpp index d06c99c..dc82af7 100644 --- a/src/ARMJIT_x64/ARMJIT_ALU.cpp +++ b/src/ARMJIT_x64/ARMJIT_ALU.cpp @@ -456,7 +456,10 @@ void Compiler::T_Comp_ALU() u32 op = (CurrentInstr.Instr >> 6) & 0xF; - Comp_AddCycles_C(); + if ((op >= 0x2 && op < 0x4) || op == 0x7) + Comp_AddCycles_CI(1); + else + Comp_AddCycles_C(); switch (op) { @@ -471,7 +474,7 @@ void Compiler::T_Comp_ALU() case 0x4: case 0x7: { - int shiftOp = op == 7 ? 3 : op - 0x2; + int shiftOp = op == 0x7 ? 3 : op - 0x2; bool carryUsed; OpArg shifted = Comp_RegShiftReg(shiftOp, rs, rd, true, carryUsed); TEST(32, shifted, shifted); diff --git a/src/ARMJIT_x64/ARMJIT_LoadStore.cpp b/src/ARMJIT_x64/ARMJIT_LoadStore.cpp new file mode 100644 index 0000000..e69de29 --- /dev/null +++ b/src/ARMJIT_x64/ARMJIT_LoadStore.cpp |