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authorRSDuck <rsduck@users.noreply.github.com>2020-04-26 23:25:32 +0200
committerRSDuck <rsduck@users.noreply.github.com>2020-06-16 11:59:10 +0200
commitb902cd1b8e0b5509f108e2b60ded3ec38b1c53fc (patch)
tree1b71bd0f2cb1d12a714dd2e24bf4b0075a848837 /src
parent5a3607bc688b42cc1da886bd2afc58d7aa4733be (diff)
fix regression from last commit
also a small mistake with msr
Diffstat (limited to 'src')
-rw-r--r--src/ARMJIT_x64/ARMJIT_Compiler.cpp2
-rw-r--r--src/ARMJIT_x64/ARMJIT_LoadStore.cpp24
2 files changed, 17 insertions, 9 deletions
diff --git a/src/ARMJIT_x64/ARMJIT_Compiler.cpp b/src/ARMJIT_x64/ARMJIT_Compiler.cpp
index 8d20425..dd20e3c 100644
--- a/src/ARMJIT_x64/ARMJIT_Compiler.cpp
+++ b/src/ARMJIT_x64/ARMJIT_Compiler.cpp
@@ -105,7 +105,7 @@ void Compiler::A_Comp_MSR()
if ((mask & 0xFF) == 0)
{
AND(32, R(RCPSR), Imm32(~mask));
- if (val.IsImm())
+ if (!val.IsImm())
{
MOV(32, R(RSCRATCH), val);
AND(32, R(RSCRATCH), Imm32(mask));
diff --git a/src/ARMJIT_x64/ARMJIT_LoadStore.cpp b/src/ARMJIT_x64/ARMJIT_LoadStore.cpp
index 85a3737..b595e32 100644
--- a/src/ARMJIT_x64/ARMJIT_LoadStore.cpp
+++ b/src/ARMJIT_x64/ARMJIT_LoadStore.cpp
@@ -502,14 +502,6 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
int regsCount = regs.Count();
- if (decrement)
- {
- MOV_sum(32, ABI_PARAM1, MapReg(rn), Imm32(-regsCount * 4));
- preinc ^= true;
- }
- else
- MOV(32, R(ABI_PARAM1), MapReg(rn));
-
s32 offset = (regsCount * 4) * (decrement ? -1 : 1);
// we need to make sure that the stack stays aligned to 16 bytes
@@ -519,6 +511,14 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
{
Comp_AddCycles_CDI();
+ if (decrement)
+ {
+ MOV_sum(32, ABI_PARAM1, MapReg(rn), Imm32(-regsCount * 4));
+ preinc ^= true;
+ }
+ else
+ MOV(32, R(ABI_PARAM1), MapReg(rn));
+
MOV(32, R(ABI_PARAM3), Imm32(regsCount));
SUB(64, R(RSP), stackAlloc <= INT8_MAX ? Imm8(stackAlloc) : Imm32(stackAlloc));
MOV(64, R(ABI_PARAM2), R(RSP));
@@ -618,6 +618,14 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
}
}
+ if (decrement)
+ {
+ MOV_sum(32, ABI_PARAM1, MapReg(rn), Imm32(-regsCount * 4));
+ preinc ^= true;
+ }
+ else
+ MOV(32, R(ABI_PARAM1), MapReg(rn));
+
MOV(64, R(ABI_PARAM2), R(RSP));
MOV(32, R(ABI_PARAM3), Imm32(regsCount));