diff options
author | StapleButter <thetotalworm@gmail.com> | 2017-04-25 01:14:26 +0200 |
---|---|---|
committer | StapleButter <thetotalworm@gmail.com> | 2017-04-25 01:14:26 +0200 |
commit | 9eb68c2ede167cf0913dcb178981b295f47eb369 (patch) | |
tree | c6a9924347d6b607fdb4867153bd24b05c85cea8 /src | |
parent | 61798ac880ed7a5073e724b91ef4498cdba2931e (diff) |
misc optimizations
Diffstat (limited to 'src')
-rw-r--r-- | src/GPU3D.cpp | 14 | ||||
-rw-r--r-- | src/GPU3D.h | 2 | ||||
-rw-r--r-- | src/GPU3D_Soft.cpp | 17 | ||||
-rw-r--r-- | src/NDS.cpp | 22 |
4 files changed, 33 insertions, 22 deletions
diff --git a/src/GPU3D.cpp b/src/GPU3D.cpp index b98c4fc..fd1b98f 100644 --- a/src/GPU3D.cpp +++ b/src/GPU3D.cpp @@ -153,7 +153,8 @@ FIFO<CmdFIFOEntry>* CmdPIPE; u32 NumCommands, CurCommand, ParamCount, TotalParams; u32 DispCnt; -u32 AlphaRef; +u8 AlphaRefVal; +u8 AlphaRef; u16 ToonTable[32]; u16 EdgeTable[8]; @@ -1932,7 +1933,8 @@ void Write8(u32 addr, u8 val) switch (addr) { case 0x04000340: - AlphaRef = val & 0x1F; + AlphaRefVal = val & 0x1F; + AlphaRef = (DispCnt & (1<<2)) ? AlphaRefVal : 0; return; } @@ -1953,10 +1955,12 @@ void Write16(u32 addr, u16 val) DispCnt = (val & 0x4FFF) | (DispCnt & 0x3000); if (val & (1<<12)) DispCnt &= ~(1<<12); if (val & (1<<13)) DispCnt &= ~(1<<13); + AlphaRef = (DispCnt & (1<<2)) ? AlphaRefVal : 0; return; case 0x04000340: - AlphaRef = val & 0x1F; + AlphaRefVal = val & 0x1F; + AlphaRef = (DispCnt & (1<<2)) ? AlphaRefVal : 0; return; case 0x04000350: @@ -2014,10 +2018,12 @@ void Write32(u32 addr, u32 val) DispCnt = (val & 0x4FFF) | (DispCnt & 0x3000); if (val & (1<<12)) DispCnt &= ~(1<<12); if (val & (1<<13)) DispCnt &= ~(1<<13); + AlphaRef = (DispCnt & (1<<2)) ? AlphaRefVal : 0; return; case 0x04000340: - AlphaRef = val & 0x1F; + AlphaRefVal = val & 0x1F; + AlphaRef = (DispCnt & (1<<2)) ? AlphaRefVal : 0; return; case 0x04000350: diff --git a/src/GPU3D.h b/src/GPU3D.h index 81856a7..79287f7 100644 --- a/src/GPU3D.h +++ b/src/GPU3D.h @@ -65,7 +65,7 @@ typedef struct } Polygon; extern u32 DispCnt; -extern u32 AlphaRef; +extern u8 AlphaRef; extern s32 Viewport[4]; extern u32 RenderClearAttr1, RenderClearAttr2; diff --git a/src/GPU3D_Soft.cpp b/src/GPU3D_Soft.cpp index eb38ee7..649f01f 100644 --- a/src/GPU3D_Soft.cpp +++ b/src/GPU3D_Soft.cpp @@ -894,6 +894,10 @@ void RenderPolygon(Polygon* polygon) r_filledge = slope_end->Increment==0; } + int yedge = 0; + if (y == ytop) yedge = 0x4; + else if (y == ybot-1) yedge = 0x8; + Interpolator interpX(xstart, xend+1, wl, wr, 8); for (s32 x = xstart; x <= xend; x++) @@ -901,9 +905,7 @@ void RenderPolygon(Polygon* polygon) if (x < 0) continue; if (x > 255) break; - int edge = 0; - if (y == ytop) edge |= 0x4; - else if (y == ybot-1) edge |= 0x8; + int edge = yedge; if (x < l_edgeend) edge |= 0x1; else if (x > r_edgestart) edge |= 0x2; @@ -966,14 +968,7 @@ void RenderPolygon(Polygon* polygon) // alpha test // TODO: check alpha test when blending is disabled - if (DispCnt & (1<<2)) - { - if (alpha <= AlphaRef) continue; - } - else - { - if (alpha == 0) continue; - } + if (alpha <= AlphaRef) continue; if (alpha == 31) { diff --git a/src/NDS.cpp b/src/NDS.cpp index 629c347..62b89c6 100644 --- a/src/NDS.cpp +++ b/src/NDS.cpp @@ -83,6 +83,7 @@ u16 PowerControl7; u16 ARM7BIOSProt; Timer Timers[8]; +u8 TimerCheckMask[2]; DMA* DMAs[8]; u32 DMA9Fill[4]; @@ -294,6 +295,8 @@ void Reset() CPUStop = 0; memset(Timers, 0, 8*sizeof(Timer)); + TimerCheckMask[0] = 0; + TimerCheckMask[1] = 0; for (i = 0; i < 8; i++) DMAs[i]->Reset(); memset(DMA9Fill, 0, 4*4); @@ -614,8 +617,8 @@ void HandleTimerOverflow(u32 tid) void RunTimer(u32 tid, s32 cycles) { Timer* timer = &Timers[tid]; - if ((timer->Cnt & 0x84) != 0x80) - return; + //if ((timer->Cnt & 0x84) != 0x80) + // return; u32 oldcount = timer->Counter; timer->Counter += (cycles << timer->CycleShift); @@ -625,10 +628,12 @@ void RunTimer(u32 tid, s32 cycles) void RunTimingCriticalDevices(u32 cpu, s32 cycles) { - RunTimer((cpu<<2)+0, cycles); - RunTimer((cpu<<2)+1, cycles); - RunTimer((cpu<<2)+2, cycles); - RunTimer((cpu<<2)+3, cycles); + register u32 timermask = TimerCheckMask[cpu]; + + if (timermask & 0x1) RunTimer((cpu<<2)+0, cycles); + if (timermask & 0x2) RunTimer((cpu<<2)+1, cycles); + if (timermask & 0x4) RunTimer((cpu<<2)+2, cycles); + if (timermask & 0x8) RunTimer((cpu<<2)+3, cycles); if (cpu == 0) { @@ -681,6 +686,11 @@ void TimerStart(u32 id, u16 cnt) { timer->Counter = timer->Reload << 16; } + + if ((cnt & 0x84) == 0x80) + TimerCheckMask[id>>2] |= (1<<(id&0x3)); + else + TimerCheckMask[id>>2] &= ~(1<<(id&0x3)); } |