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authorArisotura <thetotalworm@gmail.com>2019-06-16 14:26:54 +0200
committerArisotura <thetotalworm@gmail.com>2019-06-16 14:26:54 +0200
commit78c41736c391f65d8e6af5492ee621c956c6ed01 (patch)
tree18cdb7b39db81b093ca431840c7c348772e32fc6 /src
parent7b19a012040185a28474b6782da206c46a53c614 (diff)
fix fucking ass-stupid bug with new-WRAM handling
Diffstat (limited to 'src')
-rw-r--r--src/ARM.cpp6
-rw-r--r--src/DSi.cpp27
-rw-r--r--src/DSi_I2C.cpp1
3 files changed, 27 insertions, 7 deletions
diff --git a/src/ARM.cpp b/src/ARM.cpp
index ee72fbe..b7fe3c7 100644
--- a/src/ARM.cpp
+++ b/src/ARM.cpp
@@ -175,7 +175,6 @@ void ARMv5::JumpTo(u32 addr, bool restorecpsr)
// aging cart debug crap
//if (addr == 0x0201764C) printf("capture test %d: R1=%08X\n", R[6], R[1]);
//if (addr == 0x020175D8) printf("capture test %d: res=%08X\n", R[6], R[0]);
- //if (addr==0x037CA0D0) printf("VLORP %08X\n", R[15]);
u32 oldregion = R[15] >> 24;
u32 newregion = addr >> 24;
@@ -222,9 +221,6 @@ void ARMv5::JumpTo(u32 addr, bool restorecpsr)
CPSR &= ~0x20;
}
- // TODO: investigate this
- // firmware jumps to region 01FFxxxx, but region 5 (01000000-02000000) is set to non-executable
- // is melonDS fucked up somewhere, or is the DS PU just incomplete/crapoed?
/*if (!(PU_Map[addr>>12] & 0x04))
{
printf("jumped to %08X. very bad\n", addr);
@@ -243,8 +239,6 @@ void ARMv4::JumpTo(u32 addr, bool restorecpsr)
else addr &= ~0x1;
}
- //if (addr==0x037D5A18) printf("SHITTY FUNC. %08X\n", R[15]);
-
u32 oldregion = R[15] >> 23;
u32 newregion = addr >> 23;
diff --git a/src/DSi.cpp b/src/DSi.cpp
index 0472f1d..ae1bed2 100644
--- a/src/DSi.cpp
+++ b/src/DSi.cpp
@@ -484,16 +484,19 @@ void ARM9Write8(u32 addr, u8 val)
{
u8* ptr = NWRAMMap_A[0][(addr >> 16) & NWRAMMask[0][0]];
if (ptr) *(u8*)&ptr[addr & 0xFFFF] = val;
+ return;
}
if (addr >= NWRAMStart[0][1] && addr < NWRAMEnd[0][1])
{
u8* ptr = NWRAMMap_B[0][(addr >> 15) & NWRAMMask[0][1]];
if (ptr) *(u8*)&ptr[addr & 0x7FFF] = val;
+ return;
}
if (addr >= NWRAMStart[0][2] && addr < NWRAMEnd[0][2])
{
u8* ptr = NWRAMMap_C[0][(addr >> 15) & NWRAMMask[0][2]];
if (ptr) *(u8*)&ptr[addr & 0x7FFF] = val;
+ return;
}
return NDS::ARM9Write8(addr, val);
@@ -514,16 +517,19 @@ void ARM9Write16(u32 addr, u16 val)
{
u8* ptr = NWRAMMap_A[0][(addr >> 16) & NWRAMMask[0][0]];
if (ptr) *(u16*)&ptr[addr & 0xFFFF] = val;
+ return;
}
if (addr >= NWRAMStart[0][1] && addr < NWRAMEnd[0][1])
{
u8* ptr = NWRAMMap_B[0][(addr >> 15) & NWRAMMask[0][1]];
if (ptr) *(u16*)&ptr[addr & 0x7FFF] = val;
+ return;
}
if (addr >= NWRAMStart[0][2] && addr < NWRAMEnd[0][2])
{
u8* ptr = NWRAMMap_C[0][(addr >> 15) & NWRAMMask[0][2]];
if (ptr) *(u16*)&ptr[addr & 0x7FFF] = val;
+ return;
}
return NDS::ARM9Write16(addr, val);
@@ -544,16 +550,19 @@ void ARM9Write32(u32 addr, u32 val)
{
u8* ptr = NWRAMMap_A[0][(addr >> 16) & NWRAMMask[0][0]];
if (ptr) *(u32*)&ptr[addr & 0xFFFF] = val;
+ return;
}
if (addr >= NWRAMStart[0][1] && addr < NWRAMEnd[0][1])
{
u8* ptr = NWRAMMap_B[0][(addr >> 15) & NWRAMMask[0][1]];
if (ptr) *(u32*)&ptr[addr & 0x7FFF] = val;
+ return;
}
if (addr >= NWRAMStart[0][2] && addr < NWRAMEnd[0][2])
{
u8* ptr = NWRAMMap_C[0][(addr >> 15) & NWRAMMask[0][2]];
if (ptr) *(u32*)&ptr[addr & 0x7FFF] = val;
+ return;
}
return NDS::ARM9Write32(addr, val);
@@ -684,16 +693,19 @@ void ARM7Write8(u32 addr, u8 val)
{
u8* ptr = NWRAMMap_A[1][(addr >> 16) & NWRAMMask[1][0]];
if (ptr) *(u8*)&ptr[addr & 0xFFFF] = val;
+ return;
}
if (addr >= NWRAMStart[1][1] && addr < NWRAMEnd[1][1])
{
u8* ptr = NWRAMMap_B[1][(addr >> 15) & NWRAMMask[1][1]];
if (ptr) *(u8*)&ptr[addr & 0x7FFF] = val;
+ return;
}
if (addr >= NWRAMStart[1][2] && addr < NWRAMEnd[1][2])
{
u8* ptr = NWRAMMap_C[1][(addr >> 15) & NWRAMMask[1][2]];
if (ptr) *(u8*)&ptr[addr & 0x7FFF] = val;
+ return;
}
return NDS::ARM7Write8(addr, val);
@@ -714,16 +726,19 @@ void ARM7Write16(u32 addr, u16 val)
{
u8* ptr = NWRAMMap_A[1][(addr >> 16) & NWRAMMask[1][0]];
if (ptr) *(u16*)&ptr[addr & 0xFFFF] = val;
+ return;
}
if (addr >= NWRAMStart[1][1] && addr < NWRAMEnd[1][1])
{
u8* ptr = NWRAMMap_B[1][(addr >> 15) & NWRAMMask[1][1]];
if (ptr) *(u16*)&ptr[addr & 0x7FFF] = val;
+ return;
}
if (addr >= NWRAMStart[1][2] && addr < NWRAMEnd[1][2])
{
u8* ptr = NWRAMMap_C[1][(addr >> 15) & NWRAMMask[1][2]];
if (ptr) *(u16*)&ptr[addr & 0x7FFF] = val;
+ return;
}
return NDS::ARM7Write16(addr, val);
@@ -744,16 +759,19 @@ void ARM7Write32(u32 addr, u32 val)
{
u8* ptr = NWRAMMap_A[1][(addr >> 16) & NWRAMMask[1][0]];
if (ptr) *(u32*)&ptr[addr & 0xFFFF] = val;
+ return;
}
if (addr >= NWRAMStart[1][1] && addr < NWRAMEnd[1][1])
{
u8* ptr = NWRAMMap_B[1][(addr >> 15) & NWRAMMask[1][1]];
if (ptr) *(u32*)&ptr[addr & 0x7FFF] = val;
+ return;
}
if (addr >= NWRAMStart[1][2] && addr < NWRAMEnd[1][2])
{
u8* ptr = NWRAMMap_C[1][(addr >> 15) & NWRAMMask[1][2]];
if (ptr) *(u32*)&ptr[addr & 0x7FFF] = val;
+ return;
}
return NDS::ARM7Write32(addr, val);
@@ -827,6 +845,7 @@ u32 ARM9IORead32(u32 addr)
{
switch (addr)
{
+ case 0x04004010: return 1; // todo
}
return NDS::ARM9IORead32(addr);
@@ -864,8 +883,11 @@ u8 ARM7IORead8(u32 addr)
{
switch (addr)
{
+ case 0x04004000: return 0x01;
+ case 0x04004001: return 0x01;
+
case 0x04004500: return DSi_I2C::ReadData();
- case 0x04004501: return DSi_I2C::Cnt;
+ case 0x04004501: printf("read I2C CNT %02X\n", DSi_I2C::Cnt); return DSi_I2C::Cnt;
}
return NDS::ARM7IORead8(addr);
@@ -875,6 +897,8 @@ u16 ARM7IORead16(u32 addr)
{
switch (addr)
{
+ case 0x04004004: return 0x0187;
+ case 0x04004006: return 0; // JTAG register
}
return NDS::ARM7IORead16(addr);
@@ -884,6 +908,7 @@ u32 ARM7IORead32(u32 addr)
{
switch (addr)
{
+ case 0x04004008: return 0x80000000; // HAX
}
return NDS::ARM7IORead32(addr);
diff --git a/src/DSi_I2C.cpp b/src/DSi_I2C.cpp
index b7b7022..8b01b0e 100644
--- a/src/DSi_I2C.cpp
+++ b/src/DSi_I2C.cpp
@@ -212,6 +212,7 @@ void WriteCnt(u8 val)
u8 ReadData()
{
+ printf("I2C: read the data: %02X\n", Data);
return Data;
}