diff options
author | Raphaël Zumer <rzumer@tebako.net> | 2019-12-08 17:56:22 -0500 |
---|---|---|
committer | Raphaël Zumer <rzumer@tebako.net> | 2019-12-08 21:20:01 -0500 |
commit | 62b9f51e2329507d5e47b4239259067b5fb66240 (patch) | |
tree | 57c603ea140850710ff8681bee300e5c47611512 /src | |
parent | 48a8a25548a9aa0ed73e4d0cb2d30471326481af (diff) |
Handle GBA cartridge SRAM writes
Diffstat (limited to 'src')
-rw-r--r-- | src/GBACart.cpp | 54 | ||||
-rw-r--r-- | src/GBACart.h | 4 | ||||
-rw-r--r-- | src/NDS.cpp | 48 |
3 files changed, 106 insertions, 0 deletions
diff --git a/src/GBACart.cpp b/src/GBACart.cpp index 8ce76ab..10f5106 100644 --- a/src/GBACart.cpp +++ b/src/GBACart.cpp @@ -104,6 +104,60 @@ void RelocateSave(const char* path, bool write) fclose(f);
}
+void Write8(u32 addr, u8 val)
+{
+ u8 prev = *(u8*)&SRAM[addr];
+
+ if (prev != val)
+ {
+ *(u8*)&SRAM[addr] = val;/*
+
+ FILE* f = Platform::OpenFile(SRAMPath, "r+b");
+ if (f)
+ {
+ fseek(f, addr, SEEK_SET);
+ fwrite((u8*)&SRAM[addr], 1, 1, f);
+ fclose(f);
+ }*/
+ }
+}
+
+void Write16(u32 addr, u16 val)
+{
+ u16 prev = *(u16*)&SRAM[addr];
+
+ if (prev != val)
+ {
+ *(u16*)&SRAM[addr] = val;/*
+
+ FILE* f = Platform::OpenFile(SRAMPath, "r+b");
+ if (f)
+ {
+ fseek(f, addr, SEEK_SET);
+ fwrite((u8*)&SRAM[addr], 2, 1, f);
+ fclose(f);
+ }*/
+ }
+}
+
+void Write32(u32 addr, u32 val)
+{
+ u32 prev = *(u32*)&SRAM[addr];
+
+ if (prev != val)
+ {
+ *(u32*)&SRAM[addr] = val;/*
+
+ FILE* f = Platform::OpenFile(SRAMPath, "r+b");
+ if (f)
+ {
+ fseek(f, addr, SEEK_SET);
+ fwrite((u8*)&SRAM[addr], 3, 1, f);
+ fclose(f);
+ }*/
+ }
+}
+
}
diff --git a/src/GBACart.h b/src/GBACart.h index 94da0b2..e86ea43 100644 --- a/src/GBACart.h +++ b/src/GBACart.h @@ -29,6 +29,10 @@ namespace GBACart_SRAM extern u8* SRAM;
extern u32 SRAMLength;
+void Write8(u32 addr, u8 val);
+void Write16(u32 addr, u16 val);
+void Write32(u32 addr, u32 val);
+
}
diff --git a/src/NDS.cpp b/src/NDS.cpp index da36bdc..fe66814 100644 --- a/src/NDS.cpp +++ b/src/NDS.cpp @@ -1802,6 +1802,14 @@ void ARM9Write8(u32 addr, u8 val) case 0x07000000: // checkme return; + + case 0x0A000000: + if (ExMemCnt[0] & (1<<7)) return; // deselected CPU, skip the write + if (GBACart::CartInserted) + { + GBACart_SRAM::Write8(addr & (GBACart_SRAM::SRAMLength-1), val); + } + return; } printf("unknown arm9 write8 %08X %02X\n", addr, val); @@ -1845,6 +1853,14 @@ void ARM9Write16(u32 addr, u16 val) if (!(PowerControl9 & ((addr & 0x400) ? (1<<9) : (1<<1)))) return; *(u16*)&GPU::OAM[addr & 0x7FF] = val; return; + + case 0x0A000000: + if (ExMemCnt[0] & (1<<7)) return; // deselected CPU, skip the write + if (GBACart::CartInserted) + { + GBACart_SRAM::Write16(addr & (GBACart_SRAM::SRAMLength-1), val); + } + return; } //printf("unknown arm9 write16 %08X %04X\n", addr, val); @@ -1888,6 +1904,14 @@ void ARM9Write32(u32 addr, u32 val) if (!(PowerControl9 & ((addr & 0x400) ? (1<<9) : (1<<1)))) return; *(u32*)&GPU::OAM[addr & 0x7FF] = val; return; + + case 0x0A000000: + if (ExMemCnt[0] & (1<<7)) return; // deselected CPU, skip the write + if (GBACart::CartInserted) + { + GBACart_SRAM::Write32(addr & (GBACart_SRAM::SRAMLength-1), val); + } + return; } printf("unknown arm9 write32 %08X %08X | %08X\n", addr, val, ARM9->R[15]); @@ -2152,6 +2176,14 @@ void ARM7Write8(u32 addr, u8 val) case 0x06800000: GPU::WriteVRAM_ARM7<u8>(addr, val); return; + + case 0x0A000000: + if (!(ExMemCnt[0] & (1<<7))) return; // deselected CPU, skip the write + if (GBACart::CartInserted) + { + GBACart_SRAM::Write8(addr & (GBACart_SRAM::SRAMLength-1), val); + } + return; } printf("unknown arm7 write8 %08X %02X @ %08X\n", addr, val, ARM7->R[15]); @@ -2198,6 +2230,14 @@ void ARM7Write16(u32 addr, u16 val) case 0x06800000: GPU::WriteVRAM_ARM7<u16>(addr, val); return; + + case 0x0A000000: + if (!(ExMemCnt[0] & (1<<7))) return; // deselected CPU, skip the write + if (GBACart::CartInserted) + { + GBACart_SRAM::Write16(addr & (GBACart_SRAM::SRAMLength-1), val); + } + return; } //printf("unknown arm7 write16 %08X %04X @ %08X\n", addr, val, ARM7->R[15]); @@ -2245,6 +2285,14 @@ void ARM7Write32(u32 addr, u32 val) case 0x06800000: GPU::WriteVRAM_ARM7<u32>(addr, val); return; + + case 0x0A000000: + if (!(ExMemCnt[0] & (1<<7))) return; // deselected CPU, skip the write + if (GBACart::CartInserted) + { + GBACart_SRAM::Write32(addr & (GBACart_SRAM::SRAMLength-1), val); + } + return; } //printf("unknown arm7 write32 %08X %08X @ %08X\n", addr, val, ARM7->R[15]); |