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authorRaphaël Zumer <rzumer@tebako.net>2019-12-09 04:53:45 -0500
committerRaphaël Zumer <rzumer@tebako.net>2019-12-09 04:58:54 -0500
commit5ad85f15c1858108665329fada39d67edc408b39 (patch)
treeca57d2ab691e931d213eab7b79f7213eea445b9f /src
parent86b746dd1c61b3577c6cf6eed56f09bfbdefab6a (diff)
Add a framework to support non-SRAM GBA saves
The support is not yet there, but at least we should not read or write bogus data.
Diffstat (limited to 'src')
-rw-r--r--src/GBACart.cpp191
-rw-r--r--src/GBACart.h4
-rw-r--r--src/NDS.cpp12
3 files changed, 170 insertions, 37 deletions
diff --git a/src/GBACart.cpp b/src/GBACart.cpp
index 10f5106..937958c 100644
--- a/src/GBACart.cpp
+++ b/src/GBACart.cpp
@@ -26,11 +26,40 @@
namespace GBACart_SRAM
{
+
+enum SaveType {
+ S_NULL,
+ S_EEPROM4K,
+ S_EEPROM64K,
+ S_SRAM256K,
+ S_FLASH512K,
+ S_FLASH1M
+};
+
+struct FlashProperties
+{
+ u8 state;
+ u8 cmd;
+ u8 device;
+ u8 manufacturer;
+ u8 bank;
+};
+
u8* SRAM;
u32 SRAMLength;
+SaveType SRAMType;
+FlashProperties SRAMFlash;
char SRAMPath[1024];
+void (*WriteFunc)(u32 addr, u8 val);
+
+
+void Write_Null(u32 addr, u8 val);
+void Write_EEPROM(u32 addr, u8 val);
+void Write_SRAM(u32 addr, u8 val);
+void Write_Flash(u32 addr, u8 val);
+
bool Init()
{
@@ -47,6 +76,9 @@ void Reset()
{
if (SRAM) delete[] SRAM;
SRAM = NULL;
+ SRAMLength = 0;
+ SRAMType = S_NULL;
+ SRAMFlash = {};
}
void DoSavestate(Savestate* file)
@@ -60,6 +92,7 @@ void LoadSave(const char* path)
strncpy(SRAMPath, path, 1023);
SRAMPath[1023] = '\0';
+ SRAMLength = 0;
FILE* f = Platform::OpenFile(path, "rb");
if (f)
@@ -73,12 +106,48 @@ void LoadSave(const char* path)
fclose(f);
}
- else
+
+ switch (SRAMLength)
{
- int SRAMLength = 65536; // max GBA SRAM size
+ case 512:
+ SRAMType = S_EEPROM4K;
+ WriteFunc = Write_EEPROM;
+ break;
+ case 8192:
+ SRAMType = S_EEPROM64K;
+ WriteFunc = Write_EEPROM;
+ break;
+ case 32768:
+ SRAMType = S_SRAM256K;
+ WriteFunc = Write_SRAM;
+ break;
+ case 65536:
+ SRAMType = S_FLASH512K;
+ WriteFunc = Write_Flash;
+ break;
+ case 128*1024:
+ SRAMType = S_FLASH1M;
+ WriteFunc = Write_Flash;
+ break;
+ default:
+ printf("!! BAD SAVE LENGTH %d\n", SRAMLength);
+ case 0:
+ SRAMType = S_NULL;
+ WriteFunc = Write_Null;
+ break;
+ }
- SRAM = new u8[SRAMLength];
- memset(SRAM, 0xFF, SRAMLength);
+ if (SRAMType == S_FLASH512K)
+ {
+ // Panasonic 64K chip
+ SRAMFlash.device = 0x1B;
+ SRAMFlash.manufacturer = 0x32;
+ }
+ else if (SRAMType == S_FLASH1M)
+ {
+ // Macronix 128K chip
+ SRAMFlash.device = 0x09;
+ SRAMFlash.manufacturer = 0xC2;
}
}
@@ -104,21 +173,93 @@ void RelocateSave(const char* path, bool write)
fclose(f);
}
+u8 Read_Flash(u32 addr)
+{
+ // TODO: pokemen
+ return 0xFF;
+}
+
+void Write_Null(u32 addr, u8 val) {}
+
+void Write_EEPROM(u32 addr, u8 val)
+{
+ // TODO: could be used in homebrew?
+}
+
+void Write_Flash(u32 addr, u8 val)
+{
+ // TODO: pokemen
+}
+
+void Write_SRAM(u32 addr, u8 val)
+{
+ *(u8*)&SRAM[addr] = val;
+
+ // bit wasteful to do this for every written byte
+ FILE* f = Platform::OpenFile(SRAMPath, "r+b");
+ if (f)
+ {
+ fseek(f, addr, SEEK_SET);
+ fwrite((u8*)&SRAM[addr], 1, 1, f);
+ fclose(f);
+ }
+}
+
+u8 Read8(u32 addr)
+{
+ if (SRAMType == S_NULL)
+ {
+ return 0xFF;
+ }
+
+ if (SRAMType == S_FLASH512K || SRAMType == S_FLASH1M)
+ {
+ return Read_Flash(addr);
+ }
+
+ return *(u8*)&SRAM[addr];
+}
+
+u16 Read16(u32 addr)
+{
+ if (SRAMType == S_NULL)
+ {
+ return 0xFFFF;
+ }
+
+ if (SRAMType == S_FLASH512K || SRAMType == S_FLASH1M)
+ {
+ return Read_Flash(addr) & (Read_Flash(addr + 1) << 8);
+ }
+
+ return *(u16*)&SRAM[addr];
+}
+
+u32 Read32(u32 addr)
+{
+ if (SRAMType == S_NULL)
+ {
+ return 0xFFFFFFFF;
+ }
+
+ if (SRAMType == S_FLASH512K || SRAMType == S_FLASH1M)
+ {
+ return Read_Flash(addr) &
+ (Read_Flash(addr + 1) << 8) &
+ (Read_Flash(addr + 2) << 16) &
+ (Read_Flash(addr + 3) << 24);
+ }
+
+ return *(u32*)&SRAM[addr];
+}
+
void Write8(u32 addr, u8 val)
{
u8 prev = *(u8*)&SRAM[addr];
if (prev != val)
{
- *(u8*)&SRAM[addr] = val;/*
-
- FILE* f = Platform::OpenFile(SRAMPath, "r+b");
- if (f)
- {
- fseek(f, addr, SEEK_SET);
- fwrite((u8*)&SRAM[addr], 1, 1, f);
- fclose(f);
- }*/
+ WriteFunc(addr, val);
}
}
@@ -128,15 +269,8 @@ void Write16(u32 addr, u16 val)
if (prev != val)
{
- *(u16*)&SRAM[addr] = val;/*
-
- FILE* f = Platform::OpenFile(SRAMPath, "r+b");
- if (f)
- {
- fseek(f, addr, SEEK_SET);
- fwrite((u8*)&SRAM[addr], 2, 1, f);
- fclose(f);
- }*/
+ WriteFunc(addr, val & 0xFF);
+ WriteFunc(addr + 1, val >> 8 & 0xFF);
}
}
@@ -146,15 +280,10 @@ void Write32(u32 addr, u32 val)
if (prev != val)
{
- *(u32*)&SRAM[addr] = val;/*
-
- FILE* f = Platform::OpenFile(SRAMPath, "r+b");
- if (f)
- {
- fseek(f, addr, SEEK_SET);
- fwrite((u8*)&SRAM[addr], 3, 1, f);
- fclose(f);
- }*/
+ WriteFunc(addr, val & 0xFF);
+ WriteFunc(addr + 1, val >> 8 & 0xFF);
+ WriteFunc(addr + 2, val >> 16 & 0xFF);
+ WriteFunc(addr + 3, val >> 24 & 0xFF);
}
}
diff --git a/src/GBACart.h b/src/GBACart.h
index e86ea43..81fb222 100644
--- a/src/GBACart.h
+++ b/src/GBACart.h
@@ -29,6 +29,10 @@ namespace GBACart_SRAM
extern u8* SRAM;
extern u32 SRAMLength;
+u8 Read8(u32 addr);
+u16 Read16(u32 addr);
+u32 Read32(u32 addr);
+
void Write8(u32 addr, u8 val);
void Write16(u32 addr, u16 val);
void Write32(u32 addr, u32 val);
diff --git a/src/NDS.cpp b/src/NDS.cpp
index fe66814..a906fbb 100644
--- a/src/NDS.cpp
+++ b/src/NDS.cpp
@@ -1639,7 +1639,7 @@ u8 ARM9Read8(u32 addr)
if (ExMemCnt[0] & (1<<7)) return 0x00; // deselected CPU is 00h-filled
if (GBACart::CartInserted)
{
- return *(u8*)&GBACart_SRAM::SRAM[addr & (GBACart_SRAM::SRAMLength-1)];
+ return GBACart_SRAM::Read8(addr & (GBACart_SRAM::SRAMLength-1));
}
return 0xFF; // TODO: proper open bus
}
@@ -1704,7 +1704,7 @@ u16 ARM9Read16(u32 addr)
if (ExMemCnt[0] & (1<<7)) return 0x0000; // deselected CPU is 00h-filled
if (GBACart::CartInserted)
{
- return *(u16*)&GBACart_SRAM::SRAM[addr & (GBACart_SRAM::SRAMLength-1)];
+ return GBACart_SRAM::Read16(addr & (GBACart_SRAM::SRAMLength-1));
}
return 0xFFFF; // TODO: proper open bus
}
@@ -1769,7 +1769,7 @@ u32 ARM9Read32(u32 addr)
if (ExMemCnt[0] & (1<<7)) return 0x00000000; // deselected CPU is 00h-filled
if (GBACart::CartInserted)
{
- return *(u32*)&GBACart_SRAM::SRAM[addr & (GBACart_SRAM::SRAMLength-1)];
+ return GBACart_SRAM::Read32(addr & (GBACart_SRAM::SRAMLength-1));
}
return 0xFFFFFFFF; // TODO: proper open bus
}
@@ -2000,7 +2000,7 @@ u8 ARM7Read8(u32 addr)
if (!(ExMemCnt[0] & (1<<7))) return 0x00; // deselected CPU is 00h-filled
if (GBACart::CartInserted)
{
- return *(u8*)&GBACart_SRAM::SRAM[addr & (GBACart_SRAM::SRAMLength-1)];
+ return GBACart_SRAM::Read8(addr & (GBACart_SRAM::SRAMLength-1));
}
return 0xFF; // TODO: proper open bus
}
@@ -2067,7 +2067,7 @@ u16 ARM7Read16(u32 addr)
if (!(ExMemCnt[0] & (1<<7))) return 0x0000; // deselected CPU is 00h-filled
if (GBACart::CartInserted)
{
- return *(u16*)&GBACart_SRAM::SRAM[addr & (GBACart_SRAM::SRAMLength-1)];
+ return GBACart_SRAM::Read16(addr & (GBACart_SRAM::SRAMLength-1));
}
return 0xFFFF; // TODO: proper open bus
}
@@ -2134,7 +2134,7 @@ u32 ARM7Read32(u32 addr)
if (!(ExMemCnt[0] & (1<<7))) return 0x00000000; // deselected CPU is 00h-filled
if (GBACart::CartInserted)
{
- return *(u32*)&GBACart_SRAM::SRAM[addr & (GBACart_SRAM::SRAMLength-1)];
+ return GBACart_SRAM::Read32(addr & (GBACart_SRAM::SRAMLength-1));
}
return 0xFFFFFFFF; // TODO: proper open bus
}