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authorRSDuck <rsduck@users.noreply.github.com>2019-12-06 22:16:23 +0100
committerRSDuck <rsduck@users.noreply.github.com>2020-06-16 11:57:48 +0200
commit000c03c9d6307faa7b52988da1510cc4d0dcd8a3 (patch)
tree5fe703b1d4320a0ea8a8c423e68c1861e0eb22fd /src
parent1cfbbcbb2af09c7f56ca3f6303b0ce8a36cd7146 (diff)
disable literal optimations in DTCM
Diffstat (limited to 'src')
-rw-r--r--src/ARMJIT_x64/ARMJIT_LoadStore.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/ARMJIT_x64/ARMJIT_LoadStore.cpp b/src/ARMJIT_x64/ARMJIT_LoadStore.cpp
index 82f80a7..b66f304 100644
--- a/src/ARMJIT_x64/ARMJIT_LoadStore.cpp
+++ b/src/ARMJIT_x64/ARMJIT_LoadStore.cpp
@@ -347,8 +347,10 @@ void Compiler::Comp_MemAccess(int rd, int rn, const ComplexOperand& op2, int siz
// stupid dtcm...
if (addr >= cpu5->DTCMBase && addr < (cpu5->DTCMBase + cpu5->DTCMSize))
{
- region.Mem = cpu5->DTCM;
- region.Mask = 0x3FFF;
+ // disable this for now as DTCM is located in heap
+ // which might excced the RIP-addressable range
+ //region.Mem = cpu5->DTCM;
+ //region.Mask = 0x3FFF;
}
else
{