remove some UB

- savestates used to read a four bytes from a single byte value
- a few unassigned variables
- some other things
- also make the ROR macro an inline function

4 files changed, 4 insertions, 4 deletions

diff --git a/src/dolphin/Arm64Emitter.cpp b/src/dolphin/Arm64Emitter.cpp
index 97c93ba..289b20c 100644
--- a/src/dolphin/Arm64Emitter.cpp
+++ b/src/dolphin/Arm64Emitter.cpp
@@ -1631,7 +1631,7 @@ void ARM64XEmitter::ASR(ARM64Reg Rd, ARM64Reg Rm, int shift)
   int bits = Is64Bit(Rd) ? 64 : 32;
   SBFM(Rd, Rm, shift, bits - 1);
 }
-void ARM64XEmitter::ROR_(ARM64Reg Rd, ARM64Reg Rm, int shift)
+void ARM64XEmitter::ROR(ARM64Reg Rd, ARM64Reg Rm, int shift)
 {
   EXTR(Rd, Rm, Rm, shift);
 }
diff --git a/src/dolphin/Arm64Emitter.h b/src/dolphin/Arm64Emitter.h
index 4c49502..3da3912 100644
--- a/src/dolphin/Arm64Emitter.h
+++ b/src/dolphin/Arm64Emitter.h
@@ -727,7 +727,7 @@ public:
   void LSR(ARM64Reg Rd, ARM64Reg Rm, int shift);
   void LSL(ARM64Reg Rd, ARM64Reg Rm, int shift);
   void ASR(ARM64Reg Rd, ARM64Reg Rm, int shift);
-  void ROR_(ARM64Reg Rd, ARM64Reg Rm, int shift);
+  void ROR(ARM64Reg Rd, ARM64Reg Rm, int shift);
 
   // Logical (immediate)
   void AND(ARM64Reg Rd, ARM64Reg Rn, u32 immr, u32 imms, bool invert = false);
diff --git a/src/dolphin/x64Emitter.cpp b/src/dolphin/x64Emitter.cpp
index 343f314..fd90ba7 100644
--- a/src/dolphin/x64Emitter.cpp
+++ b/src/dolphin/x64Emitter.cpp
@@ -1214,7 +1214,7 @@ void XEmitter::ROL(int bits, const OpArg& dest, const OpArg& shift)
 {
   WriteShift(bits, dest, shift, 0);
 }
-void XEmitter::ROR_(int bits, const OpArg& dest, const OpArg& shift)
+void XEmitter::ROR(int bits, const OpArg& dest, const OpArg& shift)
 {
   WriteShift(bits, dest, shift, 1);
 }
diff --git a/src/dolphin/x64Emitter.h b/src/dolphin/x64Emitter.h
index 869acb6..8799600 100644
--- a/src/dolphin/x64Emitter.h
+++ b/src/dolphin/x64Emitter.h
@@ -489,7 +489,7 @@ public:
 
   // Shift
   void ROL(int bits, const OpArg& dest, const OpArg& shift);
-  void ROR_(int bits, const OpArg& dest, const OpArg& shift);
+  void ROR(int bits, const OpArg& dest, const OpArg& shift);
   void RCL(int bits, const OpArg& dest, const OpArg& shift);
   void RCR(int bits, const OpArg& dest, const OpArg& shift);
   void SHL(int bits, const OpArg& dest, const OpArg& shift);