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authorArisotura <thetotalworm@gmail.com>2022-10-14 00:02:54 +0200
committerArisotura <thetotalworm@gmail.com>2022-10-14 00:02:54 +0200
commitcdd05c10b414e8aa7f17391a1f8f7adc73c373e2 (patch)
tree29a4f3c93c124d96cdd9bfed84e4d6ff83b5c03a /src/DSi_DSP.cpp
parenta8fba8cc3465e736da6a19cd67a9fd99488ba721 (diff)
more DSP unfucking: make Teakra directly use melonDS's NWRAM banks instead of trying to translate to a flat buffer, fixes bugs with the way the memory banks are ordered etc
Diffstat (limited to 'src/DSi_DSP.cpp')
-rw-r--r--src/DSi_DSP.cpp85
1 files changed, 40 insertions, 45 deletions
diff --git a/src/DSi_DSP.cpp b/src/DSi_DSP.cpp
index 74170b7..333418c 100644
--- a/src/DSi_DSP.cpp
+++ b/src/DSi_DSP.cpp
@@ -89,6 +89,36 @@ void IrqSem()
NDS::SetIRQ(0, NDS::IRQ_DSi_DSP);
}
+u16 DSPRead16(u32 addr)
+{
+ if (!(addr & 0x40000))
+ {
+ u8* ptr = DSi::NWRAMMap_B[2][(addr >> 15) & DSi::NWRAMMask[0][1]];
+ return ptr ? *(u16*)&ptr[addr & 0x7FFF] : 0;
+ }
+ else
+ {
+ u8* ptr = DSi::NWRAMMap_C[2][(addr >> 15) & DSi::NWRAMMask[0][2]];
+ return ptr ? *(u16*)&ptr[addr & 0x7FFF] : 0;
+ }
+}
+
+void DSPWrite16(u32 addr, u16 val)
+{
+ // TODO: does the rule for overlapping NWRAM slots also apply to the DSP side?
+
+ if (!(addr & 0x40000))
+ {
+ u8* ptr = DSi::NWRAMMap_B[2][(addr >> 15) & DSi::NWRAMMask[0][1]];
+ if (ptr) *(u16*)&ptr[addr & 0x7FFF] = val;
+ }
+ else
+ {
+ u8* ptr = DSi::NWRAMMap_C[2][(addr >> 15) & DSi::NWRAMMask[0][2]];
+ if (ptr) *(u16*)&ptr[addr & 0x7FFF] = val;
+ }
+}
+
void AudioCb(std::array<s16, 2> frame)
{
// TODO
@@ -107,6 +137,11 @@ bool Init()
TeakraCore->SetSemaphoreHandler(IrqSem);
+ Teakra::SharedMemoryCallback smcb;
+ smcb.read16 = DSPRead16;
+ smcb.write16 = DSPWrite16;
+ TeakraCore->SetSharedMemoryCallback(smcb);
+
// these happen instantaneously and without too much regard for bus aribtration
// rules, so, this might have to be changed later on
Teakra::AHBMCallback cb;
@@ -169,46 +204,6 @@ void SetRstLine(bool release)
DSPTimestamp = NDS::ARM9Timestamp; // only start now!
}
-void OnMBKCfg(char bank, u32 slot, u8 oldcfg, u8 newcfg, u8* nwrambacking)
-{
- if (bank != 'B' && bank != 'C')
- {
- printf("WTF?? (DSP MBK recfg, nonsense bank '%c')\n", bank);
- return;
- }
-
- bool olddsp = (oldcfg & 3) >= 2, // was mapped to the DSP
- newdsp = (newcfg & 3) >= 2; // will be mapped to the DSP
-
- // nothing changes
- if (olddsp == newdsp)
- return;
-
- const u8* src;
- u8* dst;
-
- if (newdsp)
- {
- // need to map stuff to DSP memory (== Teakra-owned memory) from NWRAM
- src = nwrambacking;
- dst = &TeakraCore->GetDspMemory()[((newcfg >> 2) & 7) << 15];
-
- if (bank == 'C') // C: DSP data (B: DSP code)
- dst += DataMemoryOffset*2;
- }
- else //if (olddsp)
- {
- // it was mapped to the DSP, but now we have to copy it out, back to NWRAM
- src = &TeakraCore->GetDspMemory()[((oldcfg >> 2) & 7) << 15];
- dst = nwrambacking;
-
- if (bank == 'C') // C: DSP data (B: DSP code)
- src += DataMemoryOffset*2;
- }
-
- memcpy(dst, src, 1<<15); // 1 full slot
-}
-
inline bool IsDSPCoreEnabled()
{
return (DSi::SCFG_Clock9 & (1<<1)) && SCFG_RST && (!(DSP_PCFG & (1<<0)));
@@ -395,7 +390,7 @@ u16 PDataDMAReadMMIO()
u8 Read8(u32 addr)
{
- if (!IsDSPIOEnabled()) return 0;
+ //if (!IsDSPIOEnabled()) return 0;
DSPCatchUp();
addr &= 0x3F; // mirroring wheee
@@ -423,7 +418,7 @@ u8 Read8(u32 addr)
u16 Read16(u32 addr)
{
//printf("DSP READ16 %d %08X %08X\n", IsDSPCoreEnabled(), addr, NDS::GetPC(0));
- if (!IsDSPIOEnabled()) return 0;
+ //if (!IsDSPIOEnabled()) return 0;
DSPCatchUp();
addr &= 0x3E; // mirroring wheee
@@ -472,7 +467,7 @@ u32 Read32(u32 addr)
void Write8(u32 addr, u8 val)
{
- if (!IsDSPIOEnabled()) return;
+ //if (!IsDSPIOEnabled()) return;
DSPCatchUp();
addr &= 0x3F;
@@ -493,8 +488,8 @@ void Write8(u32 addr, u8 val)
}
void Write16(u32 addr, u16 val)
{
- //printf("DSP WRITE16 %d %08X %08X %08X\n", IsDSPCoreEnabled(), addr, val, NDS::GetPC(0));
- if (!IsDSPIOEnabled()) return;
+ printf("DSP WRITE16 %d %08X %08X %08X\n", IsDSPCoreEnabled(), addr, val, NDS::GetPC(0));
+ //if (!IsDSPIOEnabled()) return;
DSPCatchUp();
addr &= 0x3E;