diff options
author | RSDuck <rsduck@users.noreply.github.com> | 2020-07-25 20:59:53 +0200 |
---|---|---|
committer | RSDuck <rsduck@users.noreply.github.com> | 2020-07-25 20:59:53 +0200 |
commit | 8a96dfce18b8de93d8e6d5b21d7fa0ba9bbcab23 (patch) | |
tree | b92993d8349ca1c502901bf25f5b174bad25bb7f /src/CP15.cpp | |
parent | 116d831cfd1b46afd436a4026a046e38dfd4ada6 (diff) |
fix build with JIT disabled
fixes #675 and #674
Diffstat (limited to 'src/CP15.cpp')
-rw-r--r-- | src/CP15.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/CP15.cpp b/src/CP15.cpp index 992c83f..6ac31aa 100644 --- a/src/CP15.cpp +++ b/src/CP15.cpp @@ -21,9 +21,11 @@ #include "NDS.h" #include "DSi.h" #include "ARM.h" + +#ifdef JIT_ENABLED #include "ARMJIT.h" #include "ARMJIT_Memory.h" - +#endif // access timing for cached regions // this would be an average between cache hits and cache misses @@ -105,7 +107,7 @@ void ARMv5::UpdateDTCMSetting() { newDTCMBase = DTCMSetting & 0xFFFFF000; newDTCMSize = 0x200 << ((DTCMSetting >> 1) & 0x1F); - //printf("DTCM [%08X] enabled at %08X, size %X\n", DTCMSetting, DTCMBase, DTCMSize); + //printf("DTCM [%08X] enabled at %08X, size %X\n", DTCMSetting, newDTCMBase, newDTCMSize); } else { @@ -115,7 +117,9 @@ void ARMv5::UpdateDTCMSetting() } if (newDTCMBase != DTCMBase || newDTCMSize != DTCMSize) { +#ifdef JIT_ENABLED ARMJIT_Memory::RemapDTCM(newDTCMBase, newDTCMSize); +#endif DTCMBase = newDTCMBase; DTCMSize = newDTCMSize; } |