aboutsummaryrefslogtreecommitdiff
path: root/src/CP15.cpp
diff options
context:
space:
mode:
authorArisotura <thetotalworm@gmail.com>2020-06-01 20:36:30 +0200
committerArisotura <thetotalworm@gmail.com>2020-06-01 20:36:30 +0200
commit43e045357f7d74eecff61b0c8af8068b31e963b3 (patch)
treee01071eeb88dd83adaeaa1c8eef9f4e545813e2b /src/CP15.cpp
parentd7b846619b7f1d392b7b5644ddf856290b44e7e1 (diff)
make it able to switch between DS and DSi modes
Diffstat (limited to 'src/CP15.cpp')
-rw-r--r--src/CP15.cpp30
1 files changed, 10 insertions, 20 deletions
diff --git a/src/CP15.cpp b/src/CP15.cpp
index b61cc45..d340b9e 100644
--- a/src/CP15.cpp
+++ b/src/CP15.cpp
@@ -720,8 +720,7 @@ u32 ARMv5::CodeRead32(u32 addr, bool branch)
if (CodeMem.Mem) return *(u32*)&CodeMem.Mem[addr & CodeMem.Mask];
- //return NDS::ARM9Read32(addr);
- return DSi::ARM9Read32(addr);
+ return BusRead32(addr);
}
@@ -740,8 +739,7 @@ void ARMv5::DataRead8(u32 addr, u32* val)
return;
}
- *val = DSi::ARM9Read8(addr);
- //*val = NDS::ARM9Read8(addr);
+ *val = BusRead8(addr);
DataCycles = MemTimings[addr >> 12][1];
}
@@ -762,8 +760,7 @@ void ARMv5::DataRead16(u32 addr, u32* val)
return;
}
- *val = DSi::ARM9Read16(addr);
- //*val = NDS::ARM9Read16(addr);
+ *val = BusRead16(addr);
DataCycles = MemTimings[addr >> 12][1];
}
@@ -784,8 +781,7 @@ void ARMv5::DataRead32(u32 addr, u32* val)
return;
}
- *val = DSi::ARM9Read32(addr);
- //*val = NDS::ARM9Read32(addr);
+ *val = BusRead32(addr);
DataCycles = MemTimings[addr >> 12][2];
}
@@ -806,8 +802,7 @@ void ARMv5::DataRead32S(u32 addr, u32* val)
return;
}
- *val = DSi::ARM9Read32(addr);
- //*val = NDS::ARM9Read32(addr);
+ *val = BusRead32(addr);
DataCycles += MemTimings[addr >> 12][3];
}
@@ -826,8 +821,7 @@ void ARMv5::DataWrite8(u32 addr, u8 val)
return;
}
- DSi::ARM9Write8(addr, val);
- //NDS::ARM9Write8(addr, val);
+ BusWrite8(addr, val);
DataCycles = MemTimings[addr >> 12][1];
}
@@ -848,8 +842,7 @@ void ARMv5::DataWrite16(u32 addr, u16 val)
return;
}
- DSi::ARM9Write16(addr, val);
- //NDS::ARM9Write16(addr, val);
+ BusWrite16(addr, val);
DataCycles = MemTimings[addr >> 12][1];
}
@@ -870,8 +863,7 @@ void ARMv5::DataWrite32(u32 addr, u32 val)
return;
}
- DSi::ARM9Write32(addr, val);
- //NDS::ARM9Write32(addr, val);
+ BusWrite32(addr, val);
DataCycles = MemTimings[addr >> 12][2];
}
@@ -892,8 +884,7 @@ void ARMv5::DataWrite32S(u32 addr, u32 val)
return;
}
- DSi::ARM9Write32(addr, val);
- //NDS::ARM9Write32(addr, val);
+ BusWrite32(addr, val);
DataCycles += MemTimings[addr >> 12][3];
}
@@ -906,7 +897,6 @@ void ARMv5::GetCodeMemRegion(u32 addr, NDS::MemRegion* region)
return;
}*/
- DSi::ARM9GetMemRegion(addr, false, &CodeMem);
- //NDS::ARM9GetMemRegion(addr, false, &CodeMem);
+ GetMemRegion(addr, false, &CodeMem);
}