Refactor `NDS` and `DSi` to be objects (#1893)

* First crack at refactoring NDS and DSi into objects

- Remove all global/`static` variables in `NDS` and related classes
- Rely more on virtual dispatch when we need to pick methods at runtime
- Pass `NDS&` or `DSi&` to its constituent components where necessary
- Introduce some headers or move some definitions to break `#include` cycles

* Refactor the frontend to accommodate the core's changes

* Move up `SchedList`'s declaration

- Move it to before the components are initialized so the `map`s inside are initialized
- Fields in C++ are initialized in the order they're declared

* Fix a crash when allocating memory

* Fix JIT-free builds

* Fix GDB-free builds

* Fix Linux builds

- Explicitly qualify some member types in NDS, since they share the same name as their classes

* Remove an unnecessary template argument

- This was causing the build to fail on macOS

* Fix ARM and Android builds

* Rename `Constants.h` to `MemConstants.h`

* Add `NDS::IsRunning()`

* Use an `#include` guard instead of `#pragma once`

4 files changed, 40 insertions, 36 deletions

diff --git a/src/ARMJIT_x64/ARMJIT_Branch.cpp b/src/ARMJIT_x64/ARMJIT_Branch.cpp
index 5d76447..f7a01f4 100644
--- a/src/ARMJIT_x64/ARMJIT_Branch.cpp
+++ b/src/ARMJIT_x64/ARMJIT_Branch.cpp
@@ -18,6 +18,7 @@
 
 #include "ARMJIT_Compiler.h"
 #include "../ARM.h"
+#include "../NDS.h"
 
 using namespace Gen;
 
@@ -120,7 +121,7 @@ void Compiler::Comp_JumpTo(u32 addr, bool forceNonConstantCycles)
             u32 compileTimePC = CurCPU->R[15];
             CurCPU->R[15] = newPC;
 
-            cycles += NDS::ARM7MemTimings[codeCycles][0] + NDS::ARM7MemTimings[codeCycles][1];
+            cycles += NDS.ARM7MemTimings[codeCycles][0] + NDS.ARM7MemTimings[codeCycles][1];
 
             CurCPU->R[15] = compileTimePC;
         }
@@ -132,7 +133,7 @@ void Compiler::Comp_JumpTo(u32 addr, bool forceNonConstantCycles)
             u32 compileTimePC = CurCPU->R[15];
             CurCPU->R[15] = newPC;
 
-            cycles += NDS::ARM7MemTimings[codeCycles][2] + NDS::ARM7MemTimings[codeCycles][3];
+            cycles += NDS.ARM7MemTimings[codeCycles][2] + NDS.ARM7MemTimings[codeCycles][3];
 
             CurCPU->R[15] = compileTimePC;
         }
diff --git a/src/ARMJIT_x64/ARMJIT_Compiler.cpp b/src/ARMJIT_x64/ARMJIT_Compiler.cpp
index 9fc7237..eec4d7d 100644
--- a/src/ARMJIT_x64/ARMJIT_Compiler.cpp
+++ b/src/ARMJIT_x64/ARMJIT_Compiler.cpp
@@ -20,6 +20,7 @@
 
 #include "../ARMJIT.h"
 #include "../ARMInterpreter.h"
+#include "../NDS.h"
 
 #include <assert.h>
 #include <stdarg.h>
@@ -234,7 +235,7 @@ void Compiler::A_Comp_MSR()
  */
 u8 CodeMemory[1024 * 1024 * 32];
 
-Compiler::Compiler(ARMJIT& jit) : XEmitter(), JIT(jit)
+Compiler::Compiler(melonDS::NDS& nds) : XEmitter(), NDS(nds)
 {
     {
     #ifdef _WIN32
@@ -714,12 +715,12 @@ JitBlockEntry Compiler::CompileBlock(ARM* cpu, bool thumb, FetchedInstr instrs[]
     if (NearSize - (GetCodePtr() - NearStart) < 1024 * 32) // guess...
     {
         Log(LogLevel::Debug, "near reset\n");
-        JIT.ResetBlockCache();
+        NDS.JIT.ResetBlockCache();
     }
     if (FarSize - (FarCode - FarStart) < 1024 * 32) // guess...
     {
         Log(LogLevel::Debug, "far reset\n");
-        JIT.ResetBlockCache();
+        NDS.JIT.ResetBlockCache();
     }
 
     ConstantCycles = 0;
@@ -863,7 +864,7 @@ JitBlockEntry Compiler::CompileBlock(ARM* cpu, bool thumb, FetchedInstr instrs[]
 void Compiler::Comp_AddCycles_C(bool forceNonConstant)
 {
     s32 cycles = Num ?
-        NDS::ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 1 : 3]
+        NDS.ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 1 : 3]
         : ((R15 & 0x2) ? 0 : CurInstr.CodeCycles);
 
     if ((!Thumb && CurInstr.Cond() < 0xE) || forceNonConstant)
@@ -875,7 +876,7 @@ void Compiler::Comp_AddCycles_C(bool forceNonConstant)
 void Compiler::Comp_AddCycles_CI(u32 i)
 {
     s32 cycles = (Num ?
-        NDS::ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2]
+        NDS.ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2]
         : ((R15 & 0x2) ? 0 : CurInstr.CodeCycles)) + i;
 
     if (!Thumb && CurInstr.Cond() < 0xE)
@@ -887,7 +888,7 @@ void Compiler::Comp_AddCycles_CI(u32 i)
 void Compiler::Comp_AddCycles_CI(Gen::X64Reg i, int add)
 {
     s32 cycles = Num ?
-        NDS::ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2]
+        NDS.ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2]
         : ((R15 & 0x2) ? 0 : CurInstr.CodeCycles);
 
     if (!Thumb && CurInstr.Cond() < 0xE)
@@ -912,7 +913,7 @@ void Compiler::Comp_AddCycles_CDI()
 
         s32 cycles;
 
-        s32 numC = NDS::ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2];
+        s32 numC = NDS.ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2];
         s32 numD = CurInstr.DataCycles;
 
         if ((CurInstr.DataRegion >> 24) == 0x02) // mainRAM
@@ -957,7 +958,7 @@ void Compiler::Comp_AddCycles_CD()
     }
     else
     {
-        s32 numC = NDS::ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2];
+        s32 numC = NDS.ARM7MemTimings[CurInstr.CodeCycles][Thumb ? 0 : 2];
         s32 numD = CurInstr.DataCycles;
 
         if ((CurInstr.DataRegion >> 4) == 0x02)
diff --git a/src/ARMJIT_x64/ARMJIT_Compiler.h b/src/ARMJIT_x64/ARMJIT_Compiler.h
index f38a6c3..fa6d78a 100644
--- a/src/ARMJIT_x64/ARMJIT_Compiler.h
+++ b/src/ARMJIT_x64/ARMJIT_Compiler.h
@@ -35,6 +35,7 @@ namespace melonDS
 {
 class ARMJIT;
 class ARMJIT_Memory;
+class NDS;
 const Gen::X64Reg RCPU = Gen::RBP;
 const Gen::X64Reg RCPSR = Gen::R15;
 
@@ -81,9 +82,9 @@ class Compiler : public Gen::XEmitter
 {
 public:
 #ifdef JIT_ENABLED
-    explicit Compiler(ARMJIT& jit);
+    explicit Compiler(melonDS::NDS& nds);
 #else
-    explicit Compiler(ARMJIT& jit) : XEmitter(), JIT(jit) {}
+    explicit Compiler(melonDS::NDS& nds) : XEmitter(), NDS(nds) {}
 #endif
 
     void Reset();
@@ -243,7 +244,7 @@ public:
     void CreateMethod(const char* namefmt, void* start, ...);
 #endif
 
-    ARMJIT& JIT;
+    melonDS::NDS& NDS;
     u8* FarCode {};
     u8* NearCode {};
     u32 FarSize {};
diff --git a/src/ARMJIT_x64/ARMJIT_LoadStore.cpp b/src/ARMJIT_x64/ARMJIT_LoadStore.cpp
index 9b7d865..72a073d 100644
--- a/src/ARMJIT_x64/ARMJIT_LoadStore.cpp
+++ b/src/ARMJIT_x64/ARMJIT_LoadStore.cpp
@@ -18,6 +18,7 @@
 
 #include "ARMJIT_Compiler.h"
 #include "../ARMJIT.h"
+#include "../NDS.h"
 
 using namespace Gen;
 
@@ -68,9 +69,9 @@ u8* Compiler::RewriteMemAccess(u8* pc)
 
 bool Compiler::Comp_MemLoadLiteral(int size, bool signExtend, int rd, u32 addr)
 {
-    u32 localAddr = JIT.LocaliseCodeAddress(Num, addr);
+    u32 localAddr = NDS.JIT.LocaliseCodeAddress(Num, addr);
 
-    int invalidLiteralIdx = JIT.InvalidLiterals.Find(localAddr);
+    int invalidLiteralIdx = NDS.JIT.InvalidLiterals.Find(localAddr);
     if (invalidLiteralIdx != -1)
     {
         return false;
@@ -118,7 +119,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
     if (size == 16)
         addressMask = ~1;
 
-    if (JIT.LiteralOptimizations && rn == 15 && rd != 15 && op2.IsImm && !(flags & (memop_Post|memop_Store|memop_Writeback)))
+    if (NDS.JIT.LiteralOptimizations && rn == 15 && rd != 15 && op2.IsImm && !(flags & (memop_Post|memop_Store|memop_Writeback)))
     {
         u32 addr = R15 + op2.Imm * ((flags & memop_SubtractOffset) ? -1 : 1);
 
@@ -135,7 +136,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
         Comp_AddCycles_CDI();
     }
 
-    bool addrIsStatic = JIT.LiteralOptimizations
+    bool addrIsStatic = NDS.JIT.LiteralOptimizations
         && RegCache.IsLiteral(rn) && op2.IsImm && !(flags & (memop_Writeback|memop_Post));
     u32 staticAddress;
     if (addrIsStatic)
@@ -196,10 +197,10 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
         MOV(32, rnMapped, R(finalAddr));
 
     u32 expectedTarget = Num == 0
-        ? JIT.Memory.ClassifyAddress9(CurInstr.DataRegion)
-        : JIT.Memory.ClassifyAddress7(CurInstr.DataRegion);
+        ? NDS.JIT.Memory.ClassifyAddress9(CurInstr.DataRegion)
+        : NDS.JIT.Memory.ClassifyAddress7(CurInstr.DataRegion);
 
-    if (JIT.FastMemory && ((!Thumb && CurInstr.Cond() != 0xE) || JIT.Memory.IsFastmemCompatible(expectedTarget)))
+    if (NDS.JIT.FastMemory && ((!Thumb && CurInstr.Cond() != 0xE) || NDS.JIT.Memory.IsFastmemCompatible(expectedTarget)))
     {
         if (rdMapped.IsImm())
         {
@@ -212,12 +213,12 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
 
         assert(rdMapped.GetSimpleReg() >= 0 && rdMapped.GetSimpleReg() < 16);
         patch.PatchFunc = flags & memop_Store
-            ? PatchedStoreFuncs[NDS::ConsoleType][Num][__builtin_ctz(size) - 3][rdMapped.GetSimpleReg()]
-            : PatchedLoadFuncs[NDS::ConsoleType][Num][__builtin_ctz(size) - 3][!!(flags & memop_SignExtend)][rdMapped.GetSimpleReg()];
+            ? PatchedStoreFuncs[NDS.ConsoleType][Num][__builtin_ctz(size) - 3][rdMapped.GetSimpleReg()]
+            : PatchedLoadFuncs[NDS.ConsoleType][Num][__builtin_ctz(size) - 3][!!(flags & memop_SignExtend)][rdMapped.GetSimpleReg()];
 
         assert(patch.PatchFunc != NULL);
 
-        MOV(64, R(RSCRATCH), ImmPtr(Num == 0 ? JIT.Memory.FastMem9Start : JIT.Memory.FastMem7Start));
+        MOV(64, R(RSCRATCH), ImmPtr(Num == 0 ? NDS.JIT.Memory.FastMem9Start : NDS.JIT.Memory.FastMem7Start));
 
         X64Reg maskedAddr = RSCRATCH3;
         if (size > 8)
@@ -268,7 +269,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
 
         void* func = NULL;
         if (addrIsStatic)
-            func = JIT.Memory.GetFuncForAddr(CurCPU, staticAddress, flags & memop_Store, size);
+            func = NDS.JIT.Memory.GetFuncForAddr(CurCPU, staticAddress, flags & memop_Store, size);
 
         if (func)
         {
@@ -313,7 +314,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
                     MOV(32, R(ABI_PARAM1), R(RSCRATCH3));
                 if (flags & memop_Store)
                 {
-                    switch (size | NDS::ConsoleType)
+                    switch (size | NDS.ConsoleType)
                     {
                     case 32: CALL((void*)&SlowWrite9<u32, 0>); break;
                     case 16: CALL((void*)&SlowWrite9<u16, 0>); break;
@@ -325,7 +326,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
                 }
                 else
                 {
-                    switch (size | NDS::ConsoleType)
+                    switch (size | NDS.ConsoleType)
                     {
                     case 32: CALL((void*)&SlowRead9<u32, 0>); break;
                     case 16: CALL((void*)&SlowRead9<u16, 0>); break;
@@ -344,7 +345,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
                 {
                     MOV(32, R(ABI_PARAM2), rdMapped);
 
-                    switch (size | NDS::ConsoleType)
+                    switch (size | NDS.ConsoleType)
                     {
                     case 32: CALL((void*)&SlowWrite7<u32, 0>); break;
                     case 16: CALL((void*)&SlowWrite7<u16, 0>); break;
@@ -356,7 +357,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, const Op2& op2, int size, int flag
                 }
                 else
                 {
-                    switch (size | NDS::ConsoleType)
+                    switch (size | NDS.ConsoleType)
                     {
                     case 32: CALL((void*)&SlowRead7<u32, 0>); break;
                     case 16: CALL((void*)&SlowRead7<u16, 0>); break;
@@ -422,16 +423,16 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
     s32 offset = (regsCount * 4) * (decrement ? -1 : 1);
 
     int expectedTarget = Num == 0
-        ? JIT.Memory.ClassifyAddress9(CurInstr.DataRegion)
-        : JIT.Memory.ClassifyAddress7(CurInstr.DataRegion);
+        ? NDS.JIT.Memory.ClassifyAddress9(CurInstr.DataRegion)
+        : NDS.JIT.Memory.ClassifyAddress7(CurInstr.DataRegion);
 
     if (!store)
         Comp_AddCycles_CDI();
     else
         Comp_AddCycles_CD();
 
-    bool compileFastPath = JIT.FastMemory
-        && !usermode && (CurInstr.Cond() < 0xE || JIT.Memory.IsFastmemCompatible(expectedTarget));
+    bool compileFastPath = NDS.JIT.FastMemory
+        && !usermode && (CurInstr.Cond() < 0xE || NDS.JIT.Memory.IsFastmemCompatible(expectedTarget));
 
     // we need to make sure that the stack stays aligned to 16 bytes
 #ifdef _WIN32
@@ -454,7 +455,7 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
         u8* fastPathStart = GetWritableCodePtr();
         u8* loadStoreAddr[16];
 
-        MOV(64, R(RSCRATCH2), ImmPtr(Num == 0 ? JIT.Memory.FastMem9Start : JIT.Memory.FastMem7Start));
+        MOV(64, R(RSCRATCH2), ImmPtr(Num == 0 ? NDS.JIT.Memory.FastMem9Start : NDS.JIT.Memory.FastMem7Start));
         ADD(64, R(RSCRATCH2), R(RSCRATCH4));
 
         u32 offset = 0;
@@ -523,7 +524,7 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
         if (Num == 0)
             MOV(64, R(ABI_PARAM4), R(RCPU));
 
-        switch (Num * 2 | NDS::ConsoleType)
+        switch (Num * 2 | NDS.ConsoleType)
         {
         case 0: CALL((void*)&SlowBlockTransfer9<false, 0>); break;
         case 1: CALL((void*)&SlowBlockTransfer9<false, 1>); break;
@@ -627,7 +628,7 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
         if (Num == 0)
             MOV(64, R(ABI_PARAM4), R(RCPU));
 
-        switch (Num * 2 | NDS::ConsoleType)
+        switch (Num * 2 | NDS.ConsoleType)
         {
         case 0: CALL((void*)&SlowBlockTransfer9<true, 0>); break;
         case 1: CALL((void*)&SlowBlockTransfer9<true, 1>); break;
@@ -808,7 +809,7 @@ void Compiler::T_Comp_LoadPCRel()
 {
     u32 offset = (CurInstr.Instr & 0xFF) << 2;
     u32 addr = (R15 & ~0x2) + offset;
-    if (!JIT.LiteralOptimizations || !Comp_MemLoadLiteral(32, false, CurInstr.T_Reg(8), addr))
+    if (!NDS.JIT.LiteralOptimizations || !Comp_MemLoadLiteral(32, false, CurInstr.T_Reg(8), addr))
         Comp_MemAccess(CurInstr.T_Reg(8), 15, Op2(offset), 32, 0);
 }