diff options
| author | RSDuck <rsduck@users.noreply.github.com> | 2019-06-25 18:28:01 +0200 |
|---|---|---|
| committer | RSDuck <rsduck@users.noreply.github.com> | 2020-06-16 11:53:06 +0200 |
| commit | ea98a44e1e92b0f7622b28d36a1ba6c8d4679a1f (patch) | |
| tree | 8f21401221202452cf79fccc8a4a3cb0dd13ba85 /src/ARMJIT_x64/ARMJIT_ALU.cpp | |
| parent | 2f6b46fd4f4eb593746391131e2523f5252d0ea4 (diff) | |
jit: correct cycle counting for thumb shift by reg
Diffstat (limited to 'src/ARMJIT_x64/ARMJIT_ALU.cpp')
| -rw-r--r-- | src/ARMJIT_x64/ARMJIT_ALU.cpp | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/ARMJIT_x64/ARMJIT_ALU.cpp b/src/ARMJIT_x64/ARMJIT_ALU.cpp index d06c99c..dc82af7 100644 --- a/src/ARMJIT_x64/ARMJIT_ALU.cpp +++ b/src/ARMJIT_x64/ARMJIT_ALU.cpp @@ -456,7 +456,10 @@ void Compiler::T_Comp_ALU() u32 op = (CurrentInstr.Instr >> 6) & 0xF; - Comp_AddCycles_C(); + if ((op >= 0x2 && op < 0x4) || op == 0x7) + Comp_AddCycles_CI(1); + else + Comp_AddCycles_C(); switch (op) { @@ -471,7 +474,7 @@ void Compiler::T_Comp_ALU() case 0x4: case 0x7: { - int shiftOp = op == 7 ? 3 : op - 0x2; + int shiftOp = op == 0x7 ? 3 : op - 0x2; bool carryUsed; OpArg shifted = Comp_RegShiftReg(shiftOp, rs, rd, true, carryUsed); TEST(32, shifted, shifted); |