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authorArisotura <thetotalworm@gmail.com>2020-10-26 20:47:30 +0100
committerArisotura <thetotalworm@gmail.com>2020-10-26 20:47:30 +0100
commitfc922ffb14da3aa087a7eebeb55d09cf3b856e0d (patch)
tree68ad639693d7b97d286e71364ac796bfaaeefd7b /src/ARMJIT_A64
parent8d42b1c7d7466abf80a61ea51ee3006110c15b65 (diff)
parent49a96f41daa53ffa5dc4a46bdac4ee68f0b7eaee (diff)
Merge branch 'master' into dsi_camera
# Conflicts: # src/DSi_I2C.cpp
Diffstat (limited to 'src/ARMJIT_A64')
-rw-r--r--src/ARMJIT_A64/ARMJIT_ALU.cpp6
-rw-r--r--src/ARMJIT_A64/ARMJIT_Compiler.cpp2
-rw-r--r--src/ARMJIT_A64/ARMJIT_Compiler.h6
-rw-r--r--src/ARMJIT_A64/ARMJIT_LoadStore.cpp10
4 files changed, 12 insertions, 12 deletions
diff --git a/src/ARMJIT_A64/ARMJIT_ALU.cpp b/src/ARMJIT_A64/ARMJIT_ALU.cpp
index 26a89cb..52a2258 100644
--- a/src/ARMJIT_A64/ARMJIT_ALU.cpp
+++ b/src/ARMJIT_A64/ARMJIT_ALU.cpp
@@ -436,7 +436,7 @@ void Compiler::A_Comp_GetOp2(bool S, Op2& op2)
Comp_AddCycles_C();
u32 shift = (CurInstr.Instr >> 7) & 0x1E;
- u32 imm = ROR(CurInstr.Instr & 0xFF, shift);
+ u32 imm = ::ROR(CurInstr.Instr & 0xFF, shift);
if (S && shift && (CurInstr.SetFlags & 0x2))
{
@@ -447,7 +447,7 @@ void Compiler::A_Comp_GetOp2(bool S, Op2& op2)
ANDI2R(RCPSR, RCPSR, ~(1 << 29));
}
- op2 = Op2(ROR(CurInstr.Instr & 0xFF, (CurInstr.Instr >> 7) & 0x1E));
+ op2 = Op2(imm);
}
else
{
@@ -523,7 +523,7 @@ void Compiler::A_Comp_ALUMovOp()
case ST_LSL: LSL(rd, op2.Reg.Rm, op2.Reg.ShiftAmount); break;
case ST_LSR: LSR(rd, op2.Reg.Rm, op2.Reg.ShiftAmount); break;
case ST_ASR: ASR(rd, op2.Reg.Rm, op2.Reg.ShiftAmount); break;
- case ST_ROR: ROR_(rd, op2.Reg.Rm, op2.Reg.ShiftAmount); break;
+ case ST_ROR: ROR(rd, op2.Reg.Rm, op2.Reg.ShiftAmount); break;
}
}
else
diff --git a/src/ARMJIT_A64/ARMJIT_Compiler.cpp b/src/ARMJIT_A64/ARMJIT_Compiler.cpp
index b046123..80c7f04 100644
--- a/src/ARMJIT_A64/ARMJIT_Compiler.cpp
+++ b/src/ARMJIT_A64/ARMJIT_Compiler.cpp
@@ -76,7 +76,7 @@ void Compiler::A_Comp_MSR()
if (CurInstr.Instr & (1 << 25))
{
val = W0;
- MOVI2R(val, ROR((CurInstr.Instr & 0xFF), ((CurInstr.Instr >> 7) & 0x1E)));
+ MOVI2R(val, ::ROR((CurInstr.Instr & 0xFF), ((CurInstr.Instr >> 7) & 0x1E)));
}
else
{
diff --git a/src/ARMJIT_A64/ARMJIT_Compiler.h b/src/ARMJIT_A64/ARMJIT_Compiler.h
index 0e7d54c..af7497a 100644
--- a/src/ARMJIT_A64/ARMJIT_Compiler.h
+++ b/src/ARMJIT_A64/ARMJIT_Compiler.h
@@ -1,5 +1,5 @@
-#ifndef ARMJIT_COMPILER_H
-#define ARMJIT_COMPILER_H
+#ifndef ARMJIT_A64_COMPILER_H
+#define ARMJIT_A64_COMPILER_H
#include "../ARM.h"
#include "../ARMJIT.h"
@@ -266,4 +266,4 @@ public:
}
-#endif \ No newline at end of file
+#endif
diff --git a/src/ARMJIT_A64/ARMJIT_LoadStore.cpp b/src/ARMJIT_A64/ARMJIT_LoadStore.cpp
index 6140ffc..86e257a 100644
--- a/src/ARMJIT_A64/ARMJIT_LoadStore.cpp
+++ b/src/ARMJIT_A64/ARMJIT_LoadStore.cpp
@@ -42,7 +42,7 @@ s64 Compiler::RewriteMemAccess(u64 pc)
return patch.PatchOffset;
}
printf("this is a JIT bug! %08x\n", __builtin_bswap32(*(u32*)pc));
- assert(false);
+ abort();
}
bool Compiler::Comp_MemLoadLiteral(int size, bool signExtend, int rd, u32 addr)
@@ -65,7 +65,7 @@ bool Compiler::Comp_MemLoadLiteral(int size, bool signExtend, int rd, u32 addr)
if (size == 32)
{
CurCPU->DataRead32(addr & ~0x3, &val);
- val = ROR(val, (addr & 0x3) << 3);
+ val = ::ROR(val, (addr & 0x3) << 3);
}
else if (size == 16)
{
@@ -151,7 +151,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, Op2 offset, int size, int flags)
{
if (offset.Reg.ShiftType == ST_ROR)
{
- ROR_(W0, offset.Reg.Rm, offset.Reg.ShiftAmount);
+ ROR(W0, offset.Reg.Rm, offset.Reg.ShiftAmount);
offset = Op2(W0);
}
@@ -220,7 +220,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, Op2 offset, int size, int flags)
if (size == 32)
{
if (staticAddress & 0x3)
- ROR_(rdMapped, W0, (staticAddress & 0x3) << 3);
+ ROR(rdMapped, W0, (staticAddress & 0x3) << 3);
else
MOV(rdMapped, W0);
}
@@ -807,4 +807,4 @@ void Compiler::T_Comp_LDMIA_STMIA()
}
}
-} \ No newline at end of file
+}