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authorRSDuck <rsduck@users.noreply.github.com>2020-07-25 22:08:43 +0200
committerRSDuck <rsduck@users.noreply.github.com>2020-07-25 22:08:43 +0200
commit887ad27ed88fa3cd12ab14a8fe1c0c5bc63f37fb (patch)
treea7b1cddbfb6cc2d9316893b678e559cd08315e95 /src/ARMJIT_A64
parent8b83611d32e14cab123051dc347646d9ec7caa1b (diff)
implement carry setting ALU op with imm
Diffstat (limited to 'src/ARMJIT_A64')
-rw-r--r--src/ARMJIT_A64/ARMJIT_ALU.cpp13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/ARMJIT_A64/ARMJIT_ALU.cpp b/src/ARMJIT_A64/ARMJIT_ALU.cpp
index 5f021a0..26a89cb 100644
--- a/src/ARMJIT_A64/ARMJIT_ALU.cpp
+++ b/src/ARMJIT_A64/ARMJIT_ALU.cpp
@@ -434,6 +434,19 @@ void Compiler::A_Comp_GetOp2(bool S, Op2& op2)
if (CurInstr.Instr & (1 << 25))
{
Comp_AddCycles_C();
+
+ u32 shift = (CurInstr.Instr >> 7) & 0x1E;
+ u32 imm = ROR(CurInstr.Instr & 0xFF, shift);
+
+ if (S && shift && (CurInstr.SetFlags & 0x2))
+ {
+ CPSRDirty = true;
+ if (imm & 0x80000000)
+ ORRI2R(RCPSR, RCPSR, 1 << 29);
+ else
+ ANDI2R(RCPSR, RCPSR, ~(1 << 29));
+ }
+
op2 = Op2(ROR(CurInstr.Instr & 0xFF, (CurInstr.Instr >> 7) & 0x1E));
}
else