Remove the last `ConfigEntry` state (#1902)

* Get rid of `ConfigEntry::ExternalBIOSEnable`

- Now the BIOS files themselves are checked
- The frontend's `Config::ExternalBIOSEnable` is not affected

* Add `JITArgs`

* Pass the JIT status to the `ARM` constructors

* Encapsulate `NDS::EnableJIT`

* Pass `JITArgs` to `ARMJIT`'s constructor

* Remove the `JIT_*` `ConfigEntry`s in favor of members

- Allow all the JIT args to be set with `NDS::SetJITArgs`
- Encapsulate the JIT-related parameters in `ARMJIT` so they can reset the block cache if changed
- Update the active (or newly-created) console in the frontend with adjusted JIT args

* Make audio bit depth and interpolation configurable in `NDSArgs`

- Define enums for both
- Give those settings default values in `NDSArgs`
- Remove `ConfigEntry::AudioBitDepth`
- Initialize these settings in the relevant SPU constructors

* Move the last DSi-specific logic in `Reset` to its own subclass

* Remove `ConfigEntry::DSi_FullBIOSBoot`

- Add members to `DSi` instead for getting and setting this
- Update the frontend to accommodate these changes

* Oops, missed a spot

* Remove `ConfigEntry::Firm_MAC` and `Platform::GetConfigArray`

- Also move the MAC parsing code to `ROMManager`

* Remove the last `ConfigEntry` state

- Make GDB support configurable via members

* Add some `#ifdef`s that I'd almost forgotten

1 files changed, 5 insertions, 5 deletions

diff --git a/src/ARMJIT_A64/ARMJIT_LoadStore.cpp b/src/ARMJIT_A64/ARMJIT_LoadStore.cpp
index 22a410a..4007138 100644
--- a/src/ARMJIT_A64/ARMJIT_LoadStore.cpp
+++ b/src/ARMJIT_A64/ARMJIT_LoadStore.cpp
@@ -112,7 +112,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, Op2 offset, int size, int flags)
     if (size == 16)
         addressMask = ~1;
 
-    if (NDS.JIT.LiteralOptimizations && rn == 15 && rd != 15 && offset.IsImm && !(flags & (memop_Post|memop_Store|memop_Writeback)))
+    if (NDS.JIT.LiteralOptimizationsEnabled() && rn == 15 && rd != 15 && offset.IsImm && !(flags & (memop_Post|memop_Store|memop_Writeback)))
     {
         u32 addr = R15 + offset.Imm * ((flags & memop_SubtractOffset) ? -1 : 1);
         
@@ -147,7 +147,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, Op2 offset, int size, int flags)
         MOV(W0, rnMapped);
     }
 
-    bool addrIsStatic = NDS.JIT.LiteralOptimizations
+    bool addrIsStatic = NDS.JIT.LiteralOptimizationsEnabled()
         && RegCache.IsLiteral(rn) && offset.IsImm && !(flags & (memop_Writeback|memop_Post));
     u32 staticAddress;
     if (addrIsStatic)
@@ -189,7 +189,7 @@ void Compiler::Comp_MemAccess(int rd, int rn, Op2 offset, int size, int flags)
         ? NDS.JIT.Memory.ClassifyAddress9(addrIsStatic ? staticAddress : CurInstr.DataRegion)
         : NDS.JIT.Memory.ClassifyAddress7(addrIsStatic ? staticAddress : CurInstr.DataRegion);
 
-    if (NDS.JIT.FastMemory && ((!Thumb && CurInstr.Cond() != 0xE) || NDS.JIT.Memory.IsFastmemCompatible(expectedTarget)))
+    if (NDS.JIT.FastMemoryEnabled() && ((!Thumb && CurInstr.Cond() != 0xE) || NDS.JIT.Memory.IsFastmemCompatible(expectedTarget)))
     {
         ptrdiff_t memopStart = GetCodeOffset();
         LoadStorePatch patch;
@@ -453,7 +453,7 @@ void Compiler::T_Comp_LoadPCRel()
     u32 offset = ((CurInstr.Instr & 0xFF) << 2);
     u32 addr = (R15 & ~0x2) + offset;
 
-    if (!NDS.JIT.LiteralOptimizations || !Comp_MemLoadLiteral(32, false, CurInstr.T_Reg(8), addr))
+    if (!NDS.JIT.LiteralOptimizationsEnabled() || !Comp_MemLoadLiteral(32, false, CurInstr.T_Reg(8), addr))
         Comp_MemAccess(CurInstr.T_Reg(8), 15, Op2(offset), 32, 0);
 }
 
@@ -498,7 +498,7 @@ s32 Compiler::Comp_MemAccessBlock(int rn, BitSet16 regs, bool store, bool preinc
         ? NDS.JIT.Memory.ClassifyAddress9(CurInstr.DataRegion)
         : NDS.JIT.Memory.ClassifyAddress7(CurInstr.DataRegion);
 
-    bool compileFastPath = NDS.JIT.FastMemory
+    bool compileFastPath = NDS.JIT.FastMemoryEnabled()
         && store && !usermode && (CurInstr.Cond() < 0xE || NDS.JIT.Memory.IsFastmemCompatible(expectedTarget));
 
     {