diff options
author | Arisotura <thetotalworm@gmail.com> | 2020-12-04 18:28:15 +0100 |
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committer | Arisotura <thetotalworm@gmail.com> | 2020-12-04 18:28:15 +0100 |
commit | 129018a6626cbec915ef73484c51c9d07af8e8b9 (patch) | |
tree | 8e5712bd241319731f7b6ade3363cefe845e3a5e /src/ARMJIT_A64/ARMJIT_Linkage.S | |
parent | 6aad429383015a0ac135b081931ae9c5876a7ad0 (diff) | |
parent | 42e083960e52cce31589714dcc7fab8e173efb81 (diff) |
Merge remote-tracking branch 'remotes/origin/master' into dsi_camera
Diffstat (limited to 'src/ARMJIT_A64/ARMJIT_Linkage.S')
-rw-r--r-- | src/ARMJIT_A64/ARMJIT_Linkage.S | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/src/ARMJIT_A64/ARMJIT_Linkage.S b/src/ARMJIT_A64/ARMJIT_Linkage.S new file mode 100644 index 0000000..7886315 --- /dev/null +++ b/src/ARMJIT_A64/ARMJIT_Linkage.S @@ -0,0 +1,68 @@ +#include "../ARMJIT_x64/ARMJIT_Offsets.h" + +.text + +#define RCPSR w27 +#define RCycles w28 +#define RCPU x29 + +.p2align 4,,15 + +.global ARM_Dispatch +ARM_Dispatch: + stp x19, x20, [sp, #-96]! + stp x21, x22, [sp, #16] + stp x23, x24, [sp, #32] + stp x25, x26, [sp, #48] + stp x27, x28, [sp, #64] + stp x29, x30, [sp, #80] + + mov RCPU, x0 + ldr RCycles, [RCPU, ARM_Cycles_offset] + ldr RCPSR, [RCPU, ARM_CPSR_offset] + + br x1 + +.p2align 4,,15 + +.global ARM_Ret +ARM_Ret: + str RCycles, [RCPU, ARM_Cycles_offset] + str RCPSR, [RCPU, ARM_CPSR_offset] + + ldp x29, x30, [sp, #80] + ldp x27, x28, [sp, #64] + ldp x25, x26, [sp, #48] + ldp x23, x24, [sp, #32] + ldp x21, x22, [sp, #16] + ldp x19, x20, [sp], #96 + + ret + +.p2align 4,,15 + +.global ARM_RestoreContext +ARM_RestoreContext: + mov sp, x0 + + ldp x0, x1, [sp] + ldp x2, x3, [sp, #16] + ldp x4, x5, [sp, #32] + ldp x6, x7, [sp, #48] + ldp x8, x9, [sp, #64] + ldp x10, x11, [sp, #80] + ldp x12, x13, [sp, #96] + ldp x14, x15, [sp, #112] + ldp x16, x17, [sp, #128] + ldp x18, x19, [sp, #144] + ldp x20, x21, [sp, #160] + ldp x22, x23, [sp, #176] + ldp x24, x25, [sp, #192] + ldp x26, x27, [sp, #208] + ldp x28, x29, [sp, #224] + ldr x30, [sp, #240] + + ldp x17, x18, [sp, #248] + mov sp, x17 + + br x18
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