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authorStapleButter <thetotalworm@gmail.com>2017-06-12 16:36:24 +0200
committerStapleButter <thetotalworm@gmail.com>2017-06-12 16:36:24 +0200
commitbdb7edab518edd8829533449ff1810e504c2b385 (patch)
tree5cd730048faf63b3a8cfd078523b1feb55ef3e86 /src/ARMInterpreter_LoadStore.cpp
parent9852709ca350bf541a8f595fd68c90d1ef540aea (diff)
fix big with ARM STM instructions that include Rb in Rlist
Diffstat (limited to 'src/ARMInterpreter_LoadStore.cpp')
-rw-r--r--src/ARMInterpreter_LoadStore.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/ARMInterpreter_LoadStore.cpp b/src/ARMInterpreter_LoadStore.cpp
index ccbee34..16605ed 100644
--- a/src/ARMInterpreter_LoadStore.cpp
+++ b/src/ARMInterpreter_LoadStore.cpp
@@ -461,7 +461,7 @@ void A_STM(ARM* cpu)
if (i == baseid && !isbanked)
{
- if ((cpu->Num == 0) || (!(cpu->CurInstr & (i-1))))
+ if ((cpu->Num == 0) || (!(cpu->CurInstr & ((1<<i)-1))))
cpu->DataWrite32(base, oldbase);
else
cpu->DataWrite32(base, base); // checkme