diff options
author | Arisotura <thetotalworm@gmail.com> | 2021-07-17 18:26:56 +0200 |
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committer | Arisotura <thetotalworm@gmail.com> | 2021-07-17 18:26:56 +0200 |
commit | 98072d82bf35c031dd551c0aea05d73743badfca (patch) | |
tree | 9557b09df3180b4cd9630aca499461719a812d3a | |
parent | 3a9e07c0b1359669095e3c1079369419fd461e31 (diff) |
shut up DSi-IO warnings
-rw-r--r-- | src/NDS.cpp | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/NDS.cpp b/src/NDS.cpp index 16547ef..699b3a6 100644 --- a/src/NDS.cpp +++ b/src/NDS.cpp @@ -2978,6 +2978,12 @@ u16 ARM9IORead16(u32 addr) case 0x04000300: return PostFlag9; case 0x04000304: return PowerControl9; + + case 0x04004000: + case 0x04004004: + case 0x04004010: + // shut up logging for DSi registers + return 0; } if ((addr >= 0x04000000 && addr < 0x04000060) || (addr == 0x0400006C)) @@ -3111,6 +3117,12 @@ u32 ARM9IORead32(u32 addr) if (!(ExMemCnt[0] & (1<<11))) return NDSCart::ReadROMData(); return 0; + case 0x04004000: + case 0x04004004: + case 0x04004010: + // shut up logging for DSi registers + return 0; + // NO$GBA debug register "Clock Cycles" // Since it's a 64 bit reg. the CPU will access it in two parts: case 0x04FFFA20: return (u32)(GetSysClockCycles(0) & 0xFFFFFFFF); |