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| author | Valtýr Kári Daníelsson <valtyrkarid@gmail.com> | 2022-07-27 17:01:31 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-07-27 17:01:31 +0200 |
| commit | 457dd56b88b060cd981e7cb9a8a24d8fca9efcbf (patch) | |
| tree | 5a011e908128933551a844c91267dd1111c32514 | |
| parent | f5c1094d03c317a93d4f088c34e7a89c16a2b2bf (diff) | |
constexpr-s the DMA timing tables (#1489)
| -rw-r--r-- | src/DMA.h | 2 | ||||
| -rw-r--r-- | src/DMA_Timings.h | 10 |
2 files changed, 6 insertions, 6 deletions
@@ -96,7 +96,7 @@ private: bool IsGXFIFODMA; u32 MRAMBurstCount; - u8* MRAMBurstTable; + const u8* MRAMBurstTable; }; #endif diff --git a/src/DMA_Timings.h b/src/DMA_Timings.h index 1283751..f25d196 100644 --- a/src/DMA_Timings.h +++ b/src/DMA_Timings.h @@ -43,9 +43,9 @@ namespace DMATiming // setting. Timings are such that the nonseq setting only matters for the first // access, and minor edge cases (like the last of a 0x20000-byte block). -u8 MRAMDummy[1] = {0}; +constexpr u8 MRAMDummy[1] = {0}; -u8 MRAMRead16Bursts[][256] = +constexpr u8 MRAMRead16Bursts[][256] = { // main RAM to regular 16bit or 32bit bus (similar) {7, 3, 2, 2, 2, 2, 2, 2, 2, 2, @@ -119,7 +119,7 @@ u8 MRAMRead16Bursts[][256] = 0}, }; -u8 MRAMRead32Bursts[][256] = +constexpr u8 MRAMRead32Bursts[][256] = { // main RAM to regular 16bit bus {9, 4, 3, 3, 3, 3, 3, 3, 3, 3, @@ -178,7 +178,7 @@ u8 MRAMRead32Bursts[][256] = 0}, }; -u8 MRAMWrite16Bursts[][256] = +constexpr u8 MRAMWrite16Bursts[][256] = { // regular 16bit or 32bit bus to main RAM (similar) {8, 2, 2, 2, 2, 2, 2, 2, 2, 2, @@ -209,7 +209,7 @@ u8 MRAMWrite16Bursts[][256] = 0}, }; -u8 MRAMWrite32Bursts[][256] = +constexpr u8 MRAMWrite32Bursts[][256] = { // regular 16bit bus to main RAM {9, 4, 4, 4, 4, 4, 4, 4, 4, 4, |