* fixes to GXFIFO IRQ. refine IRQ support a bit.

* fix potential bug when multiple DMAs are running.

8 files changed, 63 insertions, 48 deletions

diff --git a/DMA.cpp b/DMA.cpp
index 629c14f..b3e4f2f 100644
--- a/DMA.cpp
+++ b/DMA.cpp
@@ -191,14 +191,14 @@ void DMA::Start()
         NDSCart::DMA(CurDstAddr);
         Cnt &= ~0x80000000;
         if (Cnt & 0x40000000)
-            NDS::TriggerIRQ(CPU, NDS::IRQ_DMA0 + Num);
+            NDS::SetIRQ(CPU, NDS::IRQ_DMA0 + Num);
         return;
     }
 
     // TODO eventually: not stop if we're running code in ITCM
 
     Running = true;
-    NDS::StopCPU(CPU, true);
+    NDS::StopCPU(CPU, 1<<Num);
 }
 
 s32 DMA::Run(s32 cycles)
@@ -247,9 +247,9 @@ s32 DMA::Run(s32 cycles)
         if (IterCount == 0)
         {
             Running = false;
-            NDS::StopCPU(CPU, false);
+            NDS::ResumeCPU(CPU, 1<<Num);
 
-            if (StartMode & 0x07)
+            if (StartMode == 0x07)
                 GPU3D::CheckFIFODMA();
         }
 
@@ -260,10 +260,10 @@ s32 DMA::Run(s32 cycles)
         Cnt &= ~0x80000000;
 
     if (Cnt & 0x40000000)
-        NDS::TriggerIRQ(CPU, NDS::IRQ_DMA0 + Num);
+        NDS::SetIRQ(CPU, NDS::IRQ_DMA0 + Num);
 
     Running = false;
-    NDS::StopCPU(CPU, false);
+    NDS::ResumeCPU(CPU, 1<<Num);
 
     return cycles - 2;
 }
diff --git a/GPU.cpp b/GPU.cpp
index 66a43d1..28c5d24 100644
--- a/GPU.cpp
+++ b/GPU.cpp
@@ -646,8 +646,8 @@ void StartHBlank(u32 line)
 
     if (line < 192) NDS::CheckDMAs(0, 0x02);
 
-    if (DispStat[0] & (1<<4)) NDS::TriggerIRQ(0, NDS::IRQ_HBlank);
-    if (DispStat[1] & (1<<4)) NDS::TriggerIRQ(1, NDS::IRQ_HBlank);
+    if (DispStat[0] & (1<<4)) NDS::SetIRQ(0, NDS::IRQ_HBlank);
+    if (DispStat[1] & (1<<4)) NDS::SetIRQ(1, NDS::IRQ_HBlank);
 
     if (line < 262)
         NDS::ScheduleEvent(NDS::Event_LCD, true, (LINE_CYCLES - HBLANK_CYCLES), StartScanline, line+1);
@@ -664,7 +664,7 @@ void StartScanline(u32 line)
     {
         DispStat[0] |= (1<<2);
 
-        if (DispStat[0] & (1<<5)) NDS::TriggerIRQ(0, NDS::IRQ_VCount);
+        if (DispStat[0] & (1<<5)) NDS::SetIRQ(0, NDS::IRQ_VCount);
     }
     else
         DispStat[0] &= ~(1<<2);
@@ -673,7 +673,7 @@ void StartScanline(u32 line)
     {
         DispStat[1] |= (1<<2);
 
-        if (DispStat[1] & (1<<5)) NDS::TriggerIRQ(1, NDS::IRQ_VCount);
+        if (DispStat[1] & (1<<5)) NDS::SetIRQ(1, NDS::IRQ_VCount);
     }
     else
         DispStat[1] &= ~(1<<2);
@@ -704,8 +704,8 @@ void StartScanline(u32 line)
             NDS::CheckDMAs(0, 0x01);
             NDS::CheckDMAs(1, 0x11);
 
-            if (DispStat[0] & (1<<3)) NDS::TriggerIRQ(0, NDS::IRQ_VBlank);
-            if (DispStat[1] & (1<<3)) NDS::TriggerIRQ(1, NDS::IRQ_VBlank);
+            if (DispStat[0] & (1<<3)) NDS::SetIRQ(0, NDS::IRQ_VBlank);
+            if (DispStat[1] & (1<<3)) NDS::SetIRQ(1, NDS::IRQ_VBlank);
 
             GPU2D_A->VBlank();
             GPU2D_B->VBlank();
diff --git a/GPU3D.cpp b/GPU3D.cpp
index 827b351..e713252 100644
--- a/GPU3D.cpp
+++ b/GPU3D.cpp
@@ -1324,6 +1324,11 @@ void ExecuteCommand()
             Viewport[2] = ((ExecParams[0] >> 16) & 0xFF) - Viewport[0] + 1;
             Viewport[3] = (ExecParams[0] >> 24) - Viewport[1] + 1;
             break;
+
+        default:
+            //if (entry.Command != 0x41)
+                //printf("!! UNKNOWN GX COMMAND %02X %08X\n", entry.Command, entry.Param);
+            break;
         }
     }
 }
@@ -1360,7 +1365,8 @@ void CheckFIFOIRQ()
     case 2: irq = CmdFIFO->IsEmpty(); break;
     }
 
-    if (irq) NDS::TriggerIRQ(0, NDS::IRQ_GXFIFO);
+    if (irq) NDS::SetIRQ(0, NDS::IRQ_GXFIFO);
+    else     NDS::ClearIRQ(0, NDS::IRQ_GXFIFO);
 }
 
 void CheckFIFODMA()
@@ -1456,6 +1462,7 @@ void Write32(u32 addr, u32 val)
         val &= 0xC0000000;
         GXStat &= 0x3FFFFFFF;
         GXStat |= val;
+        CheckFIFOIRQ();
         return;
     }
 
diff --git a/NDS.cpp b/NDS.cpp
index 70cf844..20f0f2f 100644
--- a/NDS.cpp
+++ b/NDS.cpp
@@ -374,7 +374,7 @@ void RunFrame()
 
         CalcIterationCycles();
 
-        if (CPUStop & 0x1)
+        if (CPUStop & 0xFFFF)
         {
             s32 cycles = CurIterationCycles;
             cycles = DMAs[0]->Run(cycles);
@@ -393,7 +393,7 @@ void RunFrame()
             ndscyclestorun = ARM9->Cycles >> 1;
         }
 
-        if (CPUStop & 0x2)
+        if (CPUStop & 0xFFFF0000)
         {
             s32 cycles = ndscyclestorun - ARM7Offset;
             cycles = DMAs[4]->Run(cycles);
@@ -529,14 +529,14 @@ void MapSharedWRAM(u8 val)
 }
 
 
-void TriggerIRQ(u32 cpu, u32 irq)
+void SetIRQ(u32 cpu, u32 irq)
 {
-    irq = 1 << irq;
-    IF[cpu] |= irq;
+    IF[cpu] |= (1 << irq);
+}
 
-    // this is redundant
-    if (!(IME[cpu] & 0x1)) return;
-    //(cpu?ARM7:ARM9)->TriggerIRQ();
+void ClearIRQ(u32 cpu, u32 irq)
+{
+    IF[cpu] &= ~(1 << irq);
 }
 
 bool HaltInterrupted(u32 cpu)
@@ -553,10 +553,16 @@ bool HaltInterrupted(u32 cpu)
     return false;
 }
 
-void StopCPU(u32 cpu, bool stop)
+void StopCPU(u32 cpu, u32 mask)
+{
+    if (cpu) mask <<= 16;
+    CPUStop |= mask;
+}
+
+void ResumeCPU(u32 cpu, u32 mask)
 {
-    if (stop) CPUStop |=  (1<<cpu);
-    else      CPUStop &= ~(1<<cpu);
+    if (cpu) mask <<= 16;
+    CPUStop &= ~mask;
 }
 
 
@@ -607,7 +613,7 @@ void TimerOverflow(u32 param)
             timer->Counter = timer->Reload << 16;
 
             if (timer->Cnt & (1<<6))
-                TriggerIRQ(cpu, IRQ_Timer0 + tid);
+                SetIRQ(cpu, IRQ_Timer0 + tid);
 
             // cascade
             if (tid == 3)
@@ -1425,7 +1431,7 @@ u32 ARM9IORead32(u32 addr)
                 ret = IPCFIFO7->Read();
 
                 if (IPCFIFO7->IsEmpty() && (IPCFIFOCnt7 & 0x0004))
-                    TriggerIRQ(1, IRQ_IPCSendDone);
+                    SetIRQ(1, IRQ_IPCSendDone);
             }
             return ret;
         }
@@ -1554,7 +1560,7 @@ void ARM9IOWrite16(u32 addr, u16 val)
         IPCSync9 |= (val & 0x4F00);
         if ((val & 0x2000) && (IPCSync7 & 0x4000))
         {
-            TriggerIRQ(1, IRQ_IPCSync);
+            SetIRQ(1, IRQ_IPCSync);
         }
         //CompensateARM7();
         return;
@@ -1563,9 +1569,9 @@ void ARM9IOWrite16(u32 addr, u16 val)
         if (val & 0x0008)
             IPCFIFO9->Clear();
         if ((val & 0x0004) && (!(IPCFIFOCnt9 & 0x0004)) && IPCFIFO9->IsEmpty())
-            TriggerIRQ(0, IRQ_IPCSendDone);
+            SetIRQ(0, IRQ_IPCSendDone);
         if ((val & 0x0400) && (!(IPCFIFOCnt9 & 0x0400)) && (!IPCFIFO7->IsEmpty()))
-            TriggerIRQ(0, IRQ_IPCRecv);
+            SetIRQ(0, IRQ_IPCRecv);
         if (val & 0x4000)
             IPCFIFOCnt9 &= ~0x4000;
         IPCFIFOCnt9 = val & 0x8404;
@@ -1695,7 +1701,7 @@ void ARM9IOWrite32(u32 addr, u32 val)
                 bool wasempty = IPCFIFO9->IsEmpty();
                 IPCFIFO9->Write(val);
                 if ((IPCFIFOCnt7 & 0x0400) && wasempty)
-                    TriggerIRQ(1, IRQ_IPCRecv);
+                    SetIRQ(1, IRQ_IPCRecv);
             }
         }
         return;
@@ -1908,7 +1914,7 @@ u32 ARM7IORead32(u32 addr)
                 ret = IPCFIFO9->Read();
 
                 if (IPCFIFO9->IsEmpty() && (IPCFIFOCnt9 & 0x0004))
-                    TriggerIRQ(0, IRQ_IPCSendDone);
+                    SetIRQ(0, IRQ_IPCSendDone);
             }
             return ret;
         }
@@ -2023,7 +2029,7 @@ void ARM7IOWrite16(u32 addr, u16 val)
         IPCSync7 |= (val & 0x4F00);
         if ((val & 0x2000) && (IPCSync9 & 0x4000))
         {
-            TriggerIRQ(0, IRQ_IPCSync);
+            SetIRQ(0, IRQ_IPCSync);
         }
         return;
 
@@ -2031,9 +2037,9 @@ void ARM7IOWrite16(u32 addr, u16 val)
         if (val & 0x0008)
             IPCFIFO7->Clear();
         if ((val & 0x0004) && (!(IPCFIFOCnt7 & 0x0004)) && IPCFIFO7->IsEmpty())
-            TriggerIRQ(1, IRQ_IPCSendDone);
+            SetIRQ(1, IRQ_IPCSendDone);
         if ((val & 0x0400) && (!(IPCFIFOCnt7 & 0x0400)) && (!IPCFIFO9->IsEmpty()))
-            TriggerIRQ(1, IRQ_IPCRecv);
+            SetIRQ(1, IRQ_IPCRecv);
         if (val & 0x4000)
             IPCFIFOCnt7 &= ~0x4000;
         IPCFIFOCnt7 = val & 0x8404;
@@ -2135,7 +2141,7 @@ void ARM7IOWrite32(u32 addr, u32 val)
                 bool wasempty = IPCFIFO7->IsEmpty();
                 IPCFIFO7->Write(val);
                 if ((IPCFIFOCnt9 & 0x0400) && wasempty)
-                    TriggerIRQ(0, IRQ_IPCRecv);
+                    SetIRQ(0, IRQ_IPCRecv);
             }
         }
         return;
diff --git a/NDS.h b/NDS.h
index fdd2af6..ed706af 100644
--- a/NDS.h
+++ b/NDS.h
@@ -140,9 +140,11 @@ void Halt();
 
 void MapSharedWRAM(u8 val);
 
-void TriggerIRQ(u32 cpu, u32 irq);
+void SetIRQ(u32 cpu, u32 irq);
+void ClearIRQ(u32 cpu, u32 irq);
 bool HaltInterrupted(u32 cpu);
-void StopCPU(u32 cpu, bool stop);
+void StopCPU(u32 cpu, u32 mask);
+void ResumeCPU(u32 cpu, u32 mask);
 
 void CheckDMAs(u32 cpu, u32 mode);
 
diff --git a/NDSCart.cpp b/NDSCart.cpp
index 308e5e5..416da26 100644
--- a/NDSCart.cpp
+++ b/NDSCart.cpp
@@ -713,7 +713,7 @@ void EndTransfer()
     ROMCnt &= ~(1<<31);
 
     if (SPICnt & (1<<14))
-        NDS::TriggerIRQ((NDS::ExMemCnt[0]>>11)&0x1, NDS::IRQ_CartSendDone);
+        NDS::SetIRQ((NDS::ExMemCnt[0]>>11)&0x1, NDS::IRQ_CartSendDone);
 }
 
 void ROMPrepareData(u32 param)
diff --git a/SPI.cpp b/SPI.cpp
index 618dcf5..13ab2ab 100644
--- a/SPI.cpp
+++ b/SPI.cpp
@@ -451,7 +451,7 @@ void WriteData(u8 val)
     }
 
     if (Cnt & (1<<14))
-        NDS::TriggerIRQ(1, NDS::IRQ_SPI);
+        NDS::SetIRQ(1, NDS::IRQ_SPI);
 }
 
 }
diff --git a/melonDS.depend b/melonDS.depend
index 9816700..62ebda9 100644
--- a/melonDS.depend
+++ b/melonDS.depend
@@ -5,12 +5,12 @@
 	"NDS.h"
 	"GPU.h"
 
-1487303037 c:\documents\sources\melonds\nds.h
+1488497585 c:\documents\sources\melonds\nds.h
 	"types.h"
 
 1481161027 c:\documents\sources\melonds\types.h
 
-1488477261 source:c:\documents\sources\melonds\nds.cpp
+1488497660 source:c:\documents\sources\melonds\nds.cpp
 	<stdio.h>
 	<string.h>
 	"NDS.h"
@@ -24,7 +24,7 @@
 	"RTC.h"
 	"Wifi.h"
 
-1487349559 source:c:\documents\sources\melonds\arm.cpp
+1488497771 source:c:\documents\sources\melonds\arm.cpp
 	<stdio.h>
 	"NDS.h"
 	"ARM.h"
@@ -81,7 +81,7 @@
 
 1486502258 c:\documents\sources\melonds\spi.h
 
-1486502498 source:c:\documents\sources\melonds\spi.cpp
+1488496264 source:c:\documents\sources\melonds\spi.cpp
 	<stdio.h>
 	<string.h>
 	"NDS.h"
@@ -109,7 +109,7 @@
 1486511075 c:\documents\sources\melonds\fifo.h
 	"types.h"
 
-1487354030 source:c:\documents\sources\melonds\dma.cpp
+1488497840 source:c:\documents\sources\melonds\dma.cpp
 	<stdio.h>
 	"NDS.h"
 	"DMA.h"
@@ -119,7 +119,7 @@
 1487305393 c:\documents\sources\melonds\dma.h
 	"types.h"
 
-1488227337 source:c:\documents\sources\melonds\gpu.cpp
+1488496264 source:c:\documents\sources\melonds\gpu.cpp
 	<stdio.h>
 	<string.h>
 	"NDS.h"
@@ -140,15 +140,15 @@
 1486506409 c:\documents\sources\melonds\ndscart.h
 	"types.h"
 
-1486506451 source:c:\documents\sources\melonds\ndscart.cpp
+1488496264 source:c:\documents\sources\melonds\ndscart.cpp
 	<stdio.h>
 	<string.h>
 	"NDS.h"
 	"NDSCart.h"
 
-1488239485 c:\documents\sources\melonds\gpu3d.h
+1488497796 c:\documents\sources\melonds\gpu3d.h
 
-1488410045 source:c:\documents\sources\melonds\gpu3d.cpp
+1488497825 source:c:\documents\sources\melonds\gpu3d.cpp
 	<stdio.h>
 	<string.h>
 	"NDS.h"