From fa296fbc6fe1c423932189116bd0cb949de0beef Mon Sep 17 00:00:00 2001
From: lonkaars <loek@pipeframe.xyz>
Date: Thu, 30 Mar 2023 17:00:05 +0200
Subject: spi not working on hardware

---
 basys3/basys3.srcs/spi_tb.vhd | 607 +++++++++++++++++++++++++++---------------
 1 file changed, 389 insertions(+), 218 deletions(-)

(limited to 'basys3/basys3.srcs/spi_tb.vhd')

diff --git a/basys3/basys3.srcs/spi_tb.vhd b/basys3/basys3.srcs/spi_tb.vhd
index 8e4b8aa..255f38b 100644
--- a/basys3/basys3.srcs/spi_tb.vhd
+++ b/basys3/basys3.srcs/spi_tb.vhd
@@ -1,3 +1,4 @@
+-- vim: ft=vhdl
 library ieee;
 library unisim;
 
@@ -25,7 +26,7 @@ begin
 
 	process
 	begin
-		for i in 0 to 10000 loop
+		while true loop
 			wait for 5 ns;
 			SYSCLK <= '1';
 			wait for 5 ns;
@@ -36,227 +37,397 @@ begin
 
 	process
 	begin
-		for i in 0 to 2 loop
-			-- data = 0b01010110010100001001110011111111 (0x56509cff)
-			SPI_DATA <= '0';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '0';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '0';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '0';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '0';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '0';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '0';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '0';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '0';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '0';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '0';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '0';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '0';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '0';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-
-			SPI_DATA <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '1';
-			wait for 50 ns;
-			SPI_CLK <= '0';
-		end loop;
+		-- -- 0xdc00: 0f0f
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+--
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '0';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+-- 0xffff: ffff
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+--
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+SPI_DATA <= '1';
+wait for 50 ns;
+SPI_CLK <= '1';
+wait for 50 ns;
+SPI_CLK <= '0';
+
+ -- m4 macro expansion (see makefile)
 
-		wait for 50 ns;
-		SPI_CLK <= '1';
-		wait for 50 ns;
-		SPI_CLK <= '0';
-		wait for 50 ns;
-		SPI_CLK <= '1';
-		wait for 50 ns;
-		SPI_CLK <= '0';
-		wait for 50 ns;
-		SPI_CLK <= '1';
-		wait for 50 ns;
-		SPI_CLK <= '0';
-		wait for 50 ns;
-		SPI_CLK <= '1';
-		wait for 50 ns;
-		SPI_CLK <= '0';
-		wait for 50 ns;
-		SPI_CLK <= '1';
-		wait for 50 ns;
-		SPI_CLK <= '0';
-		wait for 50 ns;
 		RESET <= '1';
 		wait for 50 ns;
 		RESET <= '0';
-
-
 		wait; -- stop for simulator
 	end process;
 end;
-- 
cgit v1.2.3