From ab78a6761f011a9bdcaef07d151abb5ccef4204f Mon Sep 17 00:00:00 2001 From: lonkaars Date: Fri, 10 Feb 2023 14:13:22 +0100 Subject: PPU resolution change --- assets/ppu-level-1.svg | 2 +- assets/ppu-level-2.svg | 2 +- assets/ppu-level-3.svg | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'assets') diff --git a/assets/ppu-level-1.svg b/assets/ppu-level-1.svg index e1ea30e..2770d7d 100644 --- a/assets/ppu-level-1.svg +++ b/assets/ppu-level-1.svg @@ -1,3 +1,3 @@ -
Basys3 FPGA
PPU
Basys3 FPGA...
Display output
(VGA)
Display output...
STM32F091RC
CPU
STM32F091RC...
VSYNC
VSYNC
HSYNC
HSYNC
VSYNC
VSYNC
HSYNC
HSYNC
RESET
RESET
VRAM-ADDR
VRAM-ADDR
VRAM-DATA
VRAM-DATA
VRAM-WEN
VRAM-WEN
G
G
B
B
R
R
Text is not SVG - cannot display
\ No newline at end of file +
Basys3 FPGA
PPU
Basys3 FPGA...
Display output
(VGA)
Display output...
STM32F091RC
CPU
STM32F091RC...
VSYNC
VSYNC
HSYNC
HSYNC
RESET
RESET
VRAM-ADDR
VRAM-ADDR
VRAM-DATA
VRAM-DATA
VRAM-WEN
VRAM-WEN
G
G
B
B
R
R
NVSYNC
NVSYNC
NHSYNC
NHSYNC
TVSYNC
TVSYNC
THSYNC
THSYNC
Text is not SVG - cannot display
\ No newline at end of file diff --git a/assets/ppu-level-2.svg b/assets/ppu-level-2.svg index 8844a81..d3305ac 100644 --- a/assets/ppu-level-2.svg +++ b/assets/ppu-level-2.svg @@ -1,3 +1,3 @@ -
pipeline stage 1-2
pipeline s...
pipeline stage 5
pipeline s...
pipeline stage 3-4
pipeline s...
sprite info
sprite info
TMM
TMM
Background sprite info
Background sp...
sprite info
sprite info
TMM
TMM
Foreground sprite info
Foreground sp...
global palette index
global palette index
Compositor
Compositor
VGA signal
VGA signal
VGA signal generator
VGA signal ge...
rgb value
rgb value
PAL
PAL
Palette lookup
Palette lookup
BAM
BAM
BAX
BAX
Sprite render
Sprite render
pixel data
pixel data
FAM
FAM
Sprite render
Sprite render
TMM
TMM
Tilemap memory
Tilemap memory
BAM
BAM
Background attribute memory
Background attribute...
screen position
screen position
PPU RAM bus
PPU RAM bus
PPU RAM bus
PPU RAM bus
Text is not SVG - cannot display
\ No newline at end of file +
pipeline stage 1-2
pipeline s...
pipeline stage 5
pipeline s...
pipeline stage 3-4
pipeline s...
sprite info
sprite info
TMM
TMM
Background sprite info
Background sp...
sprite info
sprite info
TMM
TMM
Foreground sprite info
Foreground sp...
global palette index
global palette index
Compositor
Compositor
VGA signal
VGA signal
tiny VGA signal generator
tiny VGA sign...
rgb value
rgb value
PAL
PAL
Palette lookup
Palette lookup
BAM
BAM
BAX
BAX
Sprite render
Sprite render
pixel data
pixel data
FAM
FAM
Sprite render
Sprite render
TMM
TMM
Tilemap memory
Tilemap memory
BAM
BAM
Background attribute memory
Background attribute...
screen position
screen position
PPU RAM bus
PPU RAM bus
PPU RAM bus
PPU RAM bus
native VGA signal generator
native VGA si...
VGA signal
VGA signal
Text is not SVG - cannot display
\ No newline at end of file diff --git a/assets/ppu-level-3.svg b/assets/ppu-level-3.svg index ed755f3..e63c6f1 100644 --- a/assets/ppu-level-3.svg +++ b/assets/ppu-level-3.svg @@ -1,3 +1,3 @@ -
VGA signal generator
VGA signal generator
CLK
CLK
R
R
G
G
B
B
R
R
G
G
B
B
X
X
Y
Y
VSYNC
VSYNC
HSYNC
HSYNC
100MHz
100MHz
CLK
CLK
Outputs
Outputs
R
R
G
G
B
B
VSYNC
VSYNC
HSYNC
HSYNC
Palette lookup
Palette lookup
CLK
CLK
CIDX
CIDX
WEN
WEN
ADDR
ADDR
DATA
DATA
R
R
G
G
B
B
RESET
RESET
Address decoder
Address decoder
WEN
WEN
ADDR
ADDR
BAX
BAX
PAL
PAL
FAM
FAM
BAM
BAM
TMM
TMM
Pipeline clock edge generator
Pipeline clock edge generator
S5
S5
S4
S4
S3
S3
S2
S2
S1
S1
CLK
CLK
RESET
RESET
Compositor
Compositor
CIDX
CIDX
BGEN
BGEN
CIDX
CIDX
FG00HIT
FG00HIT
FG01HIT
FG01HIT
FG7AHIT
FG7AHIT
( - )
( - )
FG80HIT
FG80HIT
FG7AEN
FG7AEN
FG01EN
FG01EN
FG00EN
FG00EN
( - )
( - )
FG80EN
FG80EN
Tilemap memory
Tilemap memory
ADDR
ADDR
DATA
DATA
DATA
DATA
WEN
WEN
CLK
CLK
Background attribute memory
Background attribute memory
ADDR
ADDR
DATA
DATA
DATA
DATA
WEN
WEN
CLK
CLK
Foreground sprite
Foreground sprite
CLK
CLK
CIDX
CIDX
FETCH
FETCH
WEN-FAM
WEN-FAM
ADDR-FAM
ADDR-FAM
DATA-FAM
DATA-FAM
ADDR-TMM
ADDR-TMM
DATA-TMM
DATA-TMM
X
X
Y
Y
HIT
HIT
OE
OE
Background sprite
Background sprite
CLK
CLK
CIDX
CIDX
WEN-BAX
WEN-BAX
ADDR-BAX
ADDR-BAX
DATA-BAX
DATA-BAX
ADDR-BAM
ADDR-BAM
DATA-BAM
DATA-BAM
X
X
Y
Y
OE
OE
ADDR-TMM
ADDR-TMM
DATA-TMM
DATA-TMM
Inputs
Inputs
RESET
RESET
WEN
WEN
ADDR
ADDR
DATA
DATA
Text is not SVG - cannot display
\ No newline at end of file +
tiny VGA signal generator
tiny VGA signal generator
CLK
CLK
R
R
G
G
B
B
R
R
G
G
B
B
X
X
Y
Y
VSYNC
VSYNC
HSYNC
HSYNC
100MHz
100MHz
CLK
CLK
Palette lookup
Palette lookup
CLK
CLK
CIDX
CIDX
WEN
WEN
ADDR
ADDR
DATA
DATA
R
R
G
G
B
B
RESET
RESET
Address decoder
Address decoder
WEN
WEN
ADDR
ADDR
BAX
BAX
PAL
PAL
FAM
FAM
BAM
BAM
TMM
TMM
Pipeline clock edge generator
Pipeline clock edge generator
S5
S5
S4
S4
S3
S3
S2
S2
S1
S1
CLK
CLK
RESET
RESET
Compositor
Compositor
CIDX
CIDX
BGEN
BGEN
CIDX
CIDX
FG00HIT
FG00HIT
FG01HIT
FG01HIT
FG7AHIT
FG7AHIT
( - )
( - )
FG80HIT
FG80HIT
FG7AEN
FG7AEN
FG01EN
FG01EN
FG00EN
FG00EN
( - )
( - )
FG80EN
FG80EN
Tilemap memory
Tilemap memory
ADDR
ADDR
DATA
DATA
DATA
DATA
WEN
WEN
CLK
CLK
Background attribute memory
Background attribute memory
ADDR
ADDR
DATA
DATA
DATA
DATA
WEN
WEN
CLK
CLK
Foreground sprite
Foreground sprite
CLK
CLK
CIDX
CIDX
FETCH
FETCH
WEN-FAM
WEN-FAM
ADDR-FAM
ADDR-FAM
DATA-FAM
DATA-FAM
ADDR-TMM
ADDR-TMM
DATA-TMM
DATA-TMM
X
X
Y
Y
HIT
HIT
OE
OE
Background sprite
Background sprite
CLK
CLK
CIDX
CIDX
WEN-BAX
WEN-BAX
ADDR-BAX
ADDR-BAX
DATA-BAX
DATA-BAX
ADDR-BAM
ADDR-BAM
DATA-BAM
DATA-BAM
X
X
Y
Y
OE
OE
ADDR-TMM
ADDR-TMM
DATA-TMM
DATA-TMM
Inputs
Inputs
RESET
RESET
WEN
WEN
ADDR
ADDR
DATA
DATA
native VGA signal generator
native VGA signal generator
CLK
CLK
R
R
G
G
B
B
R
R
G
G
B
B
VSYNC
VSYNC
HSYNC
HSYNC
X
X
Y
Y
Outputs
Outputs
R
R
G
G
B
B
NVSYNC
NVSYNC
NHSYNC
NHSYNC
TVSYNC
TVSYNC
THSYNC
THSYNC
Text is not SVG - cannot display
\ No newline at end of file -- cgit v1.2.3