From 151ef82382104cfef375d8c1d256d72cb61b16fd Mon Sep 17 00:00:00 2001 From: lonkaars Date: Mon, 17 Apr 2023 17:33:46 +0200 Subject: more debugging --- basys3/basys3.srcs/ppu_sprite_bg.vhd | 13 +- basys3/basys3.srcs/ppu_sprite_fg.vhd | 11 +- basys3/basys3.srcs/ppu_two_lut.vhd | 65 ++ basys3/basys3.xpr | 8 +- basys3/ppu_tb_behav.wcfg | 13 +- docs/ppu.drawio | 943 +-------------------- src/main.c | 26 +- test/ppu-stm-integration-demo/capture-debug-6.pvc | 181 +--- test/ppu-stm-integration-demo/data.h | 1 + .../test-foreground-sprite.txt | 4 +- 10 files changed, 146 insertions(+), 1119 deletions(-) create mode 100644 basys3/basys3.srcs/ppu_two_lut.vhd diff --git a/basys3/basys3.srcs/ppu_sprite_bg.vhd b/basys3/basys3.srcs/ppu_sprite_bg.vhd index a0c4ba8..59cba9f 100644 --- a/basys3/basys3.srcs/ppu_sprite_bg.vhd +++ b/basys3/basys3.srcs/ppu_sprite_bg.vhd @@ -1,6 +1,4 @@ library ieee; -library work; - use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use ieee.numeric_std.all; @@ -38,6 +36,10 @@ architecture Behavioral of ppu_sprite_bg is XO : out unsigned(PPU_SPRITE_POS_H_WIDTH-1 downto 0); -- new pixel position relative to tile YO : out unsigned(PPU_SPRITE_POS_V_WIDTH-1 downto 0)); -- new pixel position relative to tile end component; + component ppu_two_lut port( -- PPU tilemap word offset LUT (divide 8-bit number by 5) + pidx : in integer range 0 to 255; -- dividend + two : out integer range 0 to 255); -- result + end component; -- BAM and TMM in/out temp + registers signal T_BAM_ADDR, R_BAM_ADDR : std_logic_vector(PPU_BAM_ADDR_WIDTH-1 downto 0) := (others => '0'); @@ -56,8 +58,8 @@ architecture Behavioral of ppu_sprite_bg is signal TILE_IDX_X, TILE_IDX_Y : integer := 0; -- background canvas tile grid xy signal TILE_PIDX_X, TRANS_TILE_PIDX_X : unsigned(PPU_SPRITE_POS_H_WIDTH-1 downto 0) := (others => '0'); -- x position of pixel within tile (local tile coords) signal TILE_PIDX_Y, TRANS_TILE_PIDX_Y : unsigned(PPU_SPRITE_POS_V_WIDTH-1 downto 0) := (others => '0'); -- y position of pixel within tile (local tile coords) - signal TRANS_TILE_PIDX : integer := 0; -- index of pixel within tile (reading order) - signal TILEMAP_WORD_OFFSET : integer := 0; -- word offset from tile start address in TMM + signal TRANS_TILE_PIDX : integer range 0 to 255 := 0; -- index of pixel within tile (reading order) + signal TILEMAP_WORD_OFFSET : integer range 0 to 255 := 0; -- word offset from tile start address in TMM signal PIXEL_BIT_OFFSET : integer := 0; -- pixel index within word of TMM signal TMM_DATA_PAL_IDX : std_logic_vector(PPU_PALETTE_COLOR_WIDTH-1 downto 0); -- color of palette signal T_CIDX : std_logic_vector(PPU_PALETTE_CIDX_WIDTH-1 downto 0) := (others => '0'); -- output color buffer/register @@ -92,7 +94,8 @@ begin -- TMM address calculations TRANS_TILE_PIDX <= integer(PPU_SPRITE_WIDTH) * to_integer(TRANS_TILE_PIDX_Y) + to_integer(TRANS_TILE_PIDX_X); -- pixel index of sprite - TILEMAP_WORD_OFFSET <= TRANS_TILE_PIDX / PPU_PIXELS_PER_TILE_WORD; -- word offset from starting word of sprite + div: component ppu_two_lut port map(pidx => TRANS_TILE_PIDX, two => TILEMAP_WORD_OFFSET); + -- TILEMAP_WORD_OFFSET <= TRANS_TILE_PIDX / PPU_PIXELS_PER_TILE_WORD; -- word offset from starting word of sprite PIXEL_BIT_OFFSET <= TRANS_TILE_PIDX mod PPU_PIXELS_PER_TILE_WORD; -- pixel bit offset T_TMM_ADDR <= std_logic_vector(to_unsigned(PPU_SPRITE_WORD_COUNT * to_integer(unsigned(BAM_DATA_TILE_IDX)) + TILEMAP_WORD_OFFSET, PPU_TMM_ADDR_WIDTH)); -- TMM address diff --git a/basys3/basys3.srcs/ppu_sprite_fg.vhd b/basys3/basys3.srcs/ppu_sprite_fg.vhd index 94fecaa..9d41311 100644 --- a/basys3/basys3.srcs/ppu_sprite_fg.vhd +++ b/basys3/basys3.srcs/ppu_sprite_fg.vhd @@ -56,6 +56,10 @@ architecture Behavioral of ppu_sprite_fg is DATA : in std_logic_vector(DATA_W-1 downto 0); -- data input REG : out std_logic_vector((ADDR_RANGE*DATA_W)-1 downto 0)); -- exposed register output end component; + component ppu_two_lut port( -- PPU tilemap word offset LUT (divide 8-bit number by 5) + pidx : in integer range 0 to 255; -- dividend + two : out integer range 0 to 255); -- result + end component; -- TMM in/out temp + registers signal T_TMM_ADDR, R_TMM_ADDR : std_logic_vector(PPU_TMM_ADDR_WIDTH-1 downto 0) := (others => '0'); @@ -78,9 +82,9 @@ architecture Behavioral of ppu_sprite_fg is signal PIXEL_BIT_OFFSET : integer := 0; -- pixel index within word of TMM signal TILE_PIDX_X, TRANS_TILE_PIDX_X : unsigned(PPU_SPRITE_POS_H_WIDTH-1 downto 0) := (others => '0'); -- xy position of pixel within tile (local tile coords) signal TILE_PIDX_Y, TRANS_TILE_PIDX_Y : unsigned(PPU_SPRITE_POS_V_WIDTH-1 downto 0) := (others => '0'); -- xy position of pixel within tile (local tile coords) - signal TRANS_TILE_PIDX : integer := 0; -- index of pixel within tile (reading order) + signal TRANS_TILE_PIDX : integer range 0 to 255 := 0; -- index of pixel within tile (reading order) signal TILEMAP_WORD : unsigned(PPU_TMM_ADDR_WIDTH-1 downto 0) := (others => '0'); - signal TILEMAP_WORD_OFFSET : integer := 0; -- word offset from tile start address in TMM + signal TILEMAP_WORD_OFFSET : integer range 0 to 255 := 0; -- word offset from tile start address in TMM signal TMM_DATA_COL_IDX : std_logic_vector(PPU_PALETTE_COLOR_WIDTH-1 downto 0); -- color of palette signal TMM_ADDR_EN : boolean := false; @@ -129,7 +133,8 @@ begin -- pixel index TRANS_TILE_PIDX <= integer(PPU_SPRITE_WIDTH) * to_integer(TRANS_TILE_PIDX_Y) + to_integer(TRANS_TILE_PIDX_X); TILEMAP_WORD <= resize(unsigned(FAM_REG_TILE_IDX) * PPU_SPRITE_WORD_COUNT, TILEMAP_WORD'length); -- TMM sprite starting word - TILEMAP_WORD_OFFSET <= TRANS_TILE_PIDX / PPU_PIXELS_PER_TILE_WORD; -- word offset from starting word of sprite + div: component ppu_two_lut port map(pidx => TRANS_TILE_PIDX, two => TILEMAP_WORD_OFFSET); + -- TILEMAP_WORD_OFFSET <= TRANS_TILE_PIDX / PPU_PIXELS_PER_TILE_WORD; -- word offset from starting word of sprite PIXEL_BIT_OFFSET <= TRANS_TILE_PIDX mod PPU_PIXELS_PER_TILE_WORD; -- pixel bit offset inaccurate_occlusion_shims: if IDX >= PPU_ACCURATE_FG_SPRITE_COUNT generate diff --git a/basys3/basys3.srcs/ppu_two_lut.vhd b/basys3/basys3.srcs/ppu_two_lut.vhd new file mode 100644 index 0000000..92c18a1 --- /dev/null +++ b/basys3/basys3.srcs/ppu_two_lut.vhd @@ -0,0 +1,65 @@ +library ieee; +use ieee.std_logic_1164.all; + +entity ppu_two_lut is port( -- PPU tilemap word offset LUT (divide 8-bit number by 5) + pidx : in integer range 0 to 255; -- dividend + two : out integer range 0 to 255); -- result +end ppu_two_lut; + +architecture Behavioral of ppu_two_lut is +begin + with pidx select two <= + 0 when 0 | 1 | 2 | 3 | 4, + 1 when 5 | 6 | 7 | 8 | 9, + 2 when 10 | 11 | 12 | 13 | 14, + 3 when 15 | 16 | 17 | 18 | 19, + 4 when 20 | 21 | 22 | 23 | 24, + 5 when 25 | 26 | 27 | 28 | 29, + 6 when 30 | 31 | 32 | 33 | 34, + 7 when 35 | 36 | 37 | 38 | 39, + 8 when 40 | 41 | 42 | 43 | 44, + 9 when 45 | 46 | 47 | 48 | 49, + 10 when 50 | 51 | 52 | 53 | 54, + 11 when 55 | 56 | 57 | 58 | 59, + 12 when 60 | 61 | 62 | 63 | 64, + 13 when 65 | 66 | 67 | 68 | 69, + 14 when 70 | 71 | 72 | 73 | 74, + 15 when 75 | 76 | 77 | 78 | 79, + 16 when 80 | 81 | 82 | 83 | 84, + 17 when 85 | 86 | 87 | 88 | 89, + 18 when 90 | 91 | 92 | 93 | 94, + 19 when 95 | 96 | 97 | 98 | 99, + 20 when 100 | 101 | 102 | 103 | 104, + 21 when 105 | 106 | 107 | 108 | 109, + 22 when 110 | 111 | 112 | 113 | 114, + 23 when 115 | 116 | 117 | 118 | 119, + 24 when 120 | 121 | 122 | 123 | 124, + 25 when 125 | 126 | 127 | 128 | 129, + 26 when 130 | 131 | 132 | 133 | 134, + 27 when 135 | 136 | 137 | 138 | 139, + 28 when 140 | 141 | 142 | 143 | 144, + 29 when 145 | 146 | 147 | 148 | 149, + 30 when 150 | 151 | 152 | 153 | 154, + 31 when 155 | 156 | 157 | 158 | 159, + 32 when 160 | 161 | 162 | 163 | 164, + 33 when 165 | 166 | 167 | 168 | 169, + 34 when 170 | 171 | 172 | 173 | 174, + 35 when 175 | 176 | 177 | 178 | 179, + 36 when 180 | 181 | 182 | 183 | 184, + 37 when 185 | 186 | 187 | 188 | 189, + 38 when 190 | 191 | 192 | 193 | 194, + 39 when 195 | 196 | 197 | 198 | 199, + 40 when 200 | 201 | 202 | 203 | 204, + 41 when 205 | 206 | 207 | 208 | 209, + 42 when 210 | 211 | 212 | 213 | 214, + 43 when 215 | 216 | 217 | 218 | 219, + 44 when 220 | 221 | 222 | 223 | 224, + 45 when 225 | 226 | 227 | 228 | 229, + 46 when 230 | 231 | 232 | 233 | 234, + 47 when 235 | 236 | 237 | 238 | 239, + 48 when 240 | 241 | 242 | 243 | 244, + 49 when 245 | 246 | 247 | 248 | 249, + 50 when 250 | 251 | 252 | 253 | 254, + 51 when 255, + 0 when others; +end Behavioral; diff --git a/basys3/basys3.xpr b/basys3/basys3.xpr index 45547d3..1ce4a80 100644 --- a/basys3/basys3.xpr +++ b/basys3/basys3.xpr @@ -59,7 +59,7 @@